In this paper we perform the analysis of the popular TPMS (tire pressure monitoring systems) and their application for traffic management purposes. In particular, we evaluate several of the commercially available TPMS devices and analyze their architecture and communication features. Furthermore, we propose the architecture of an external sensor device used for effective eavesdropping of TPMS ID data. Finally, we evaluate the possibility of utilizing such systems for the identification and re-identification of traffic participants using the unique ID of TPMS sensors.
In this paper we present initial results in utilization of TPMS (Tire Pressure Monitoring System) for collecting traffic data and deriving traffic information, i.e. travel times. The obtained results show that current detection ratio is less than 5 % and the obtained travel times are in consistency with referent data. The experiment is performed on DLR test track in Berlin. In particular, architecture of TPMS receiver is proposed. Next, the algorithm for reducing data redundancy and for deriving traffic information is introduced. Finally the obtained results are presented.
In this paper, we evaluate Tire Pressure Monitoring System (TPMS) for traffic management purposes. It has been shown that up to 60 % of the vehicles can be detected in urban traffic environments, which makes it suitable for deriving: routes, travel times and the traffic state. In particular, the theoretical background and basic concepts are given. Furthermore, we present a simple simulation model of TPMS based on empirical investigations. A simulation platform, based on traffic simulator, used for evaluation is introduced. Next, simulation results related to the number of detected vehicles are given regarding detection range, sensor transmission period and traffic flow. The impact of the roadside unit's location, as well as the number of detected vehicles, is investigated by simulating a realistic traffic scenario. Finally, the applicability of TPMS for deriving different traffic information is evaluated.
High operating speed, fault tolerance (FT), low power and reconfiguration become today dominant issues during development and design of linear feedback shift registers (LFSRs), used as sequence generators, with randomness properties, in a process of testing complex CMOS VLSI ICs. In our design solution, we accomplish FT by using triple modular redundancy (TMR), i.e., a hardware scheme that uses spatial redundancy. For reduction of dynamic power consumption, clock-gating technique, as a simple and effective method, is implemented. The reconfigurable FPGA architecture provides us a feature to program and configure the degree of the primitive polynomial that the LFSR uses. High speed of operation, over 100 MHz, during testing is achieved by using circuits fabricated in submicron technology. An architecture which integrates in a single structure (IP core) all aforementioned design issues, named fault tolerant reconfigurable low-power pseudo-random number generator (FT_RLRG), is described in this article. The design of FT_RLRG is of practical interest in testing triple modular FT systems in the presence of single event upsets (SEUs), especially in a case when the design is SRAM-based. As an IP core the FT_RLRG has been implemented both on FPGA and ASIC technology. The main idea was to design a low-cost and low-power hardware structure which is able to adjust to any standards (past, present and future) operating at high-speed with different polynomials (currently up to 32nd order). The performance of FT_RLRG in respect to speed of operation (up to 150 MHz for FPGA and ASIC designs), low hardware overhead (0.033 mm2 area for ASIC and up to 530 slices for FPGA) and low-power consumption (0.45 mW for ASIC), for three different FPGA architecture (Spartan-3E, Virtex-4 and Virtex-6LP) and as an ASIC design implemented in 130 nm SiGe BiCMOS technology, have been estimated.
This paper discusses an implementation of a multimedia projection system with two synchronized video sources, based on the Raspberry Pi single board computer systems. The system is primarily intended for various projections in presentation of historical and cultural heritage, although it can be used for many other related purposes. The considered multimedia system has two projection surfaces - a horizontal projection plane and a 45° inclined special glass projection plane which creates the hologramlike Pepper’s Ghost effect. Each plane displays a separate high-definition video obtained from the corresponding Raspberry Pi. Synchronization of presentations is achieved using cu stom connection throu gh the general purpose input/output (GPIO) connector of the Raspberry Pi and the wiringPi interface library. As valuable aspects of the system, we can point out the following. From the practical point of view, the system has low cost due to the use of Rasp berry Pis. Generation of a holograp hic effect, as well as larger flexibility in creating the contents of the presentations due to the two projection surfaces, are additional attractive features.
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