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The model of a modular multilevel converter (MMC) determines the extent of critical circuit information that electromagnetic transient simulations can reveal. In this paper, two MMC models are proposed for efficient real-time hardware-in-the-loop (HIL) emulation on the field-programmable-gate-arrays (FPGA). The nonlinear switch-based model employing the insulated-gate bipolar transistor (IGBT) dynamic curve-fitting model considers factors affecting its transient performance so that device-level behavior such as power loss and junction temperature can be reproduced accurately in the electro-magnetic-thermal simulation of a power converter for its design evaluation. Meanwhile, regarding the MMC submodule as a transmission line stub achieves faster computation speed and enables the formation of a hybrid arm to save FPGA hardware resources. As the large network that the MMC presents is burdensome for real-time execution with a small time-step, circuit simplification based on partitioning and merging is conducted. Hardware implementation of a three-terminal high-voltage direct-current system containing an MMC-based dcdc converter is carried out and the efficacy of proposed models is validated by comparing HIL emulation results with the offline simulation tool PSCAD/EMTDC.

The efficiency of multiterminal dc (MTDC) grid simulation decreases with an expansion of its scale and the inclusion of accurate component models. Thus, the variable time-stepping scheme is proposed in this paper to expedite the electromagnetic transient computation. A number of criteria are proposed to evaluate the time-step and regulate it dynamically during simulation. Meanwhile, as the accuracy of results is heavily reliant on the switch model in the modular multilevel converter, the nonlinear behavioral model with a greater accuracy is proposed in addition to the classic ideal model, and their corresponding variable time-stepping schemes are analyzed. Circuit partitioning is effective in accelerating the MTDC grid simulation via fine-grained separation of nonlinearities. A subsequent large number of identical circuits enabled a massively parallel implementation on the graphics processing unit, which achieved a remarkable speedup over the CPU-based implementation. The inclusion of variable time-stepping schemes eventually makes the simulation of MTDC grid with highly detailed nonlinear switch models feasible. The results are validated by commercial device-level and system-level simulation tools.