Reversible computing has tremendous benefits in terms of power consumption, less heat dissipation and packaging density. Because its applications are found in diverse fields including quantum computing, nanotechnology, low power CMOS designs and cryptography, Reversible computing has gained attraction of many researchers recently. In order to incorporate fault testing capability in reversible circuits, a number of offline and online approaches have been proposed. In order to extend online testability of reversible circuits, an analysis followed by a Peres gate substitution is presented here. The proposed extension has identified online testing capabilities of MCF gates and has made all available libraries including MCT+MCF, MCT+P online testable. Furthermore a conversion for parity-preserving reversible circuits is presented. Finally the paper is concluded by proposing a generic online testable substitution of n*n reversible gate.