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In this letter, a monolithically integrated SiC circuit breaker device providing self-triggered blocking operation is presented. The proposed topology is implemented into a common 4H-SiC JFET technology, which offers conventional cell design and chip scaling opportunities. Basic operation and design implications are discussed on the basis of quasi-static electrical measurements of fabricated nJFET, pJFET and circuit breaker devices. The design of experiment including a variation of channel length and channel doping dose reveals a distinct effect on the design targets, especially on on-state resistance, trigger current and blocking voltage. The investigated devices exhibit trigger current density levels of up to 2.8 A/cm² and self-sustained blocking capability up to 795 V DC-link voltage. On-state resistance at room temperature is determined to 0.93 Ωcm² but drastically decreases at elevated temperatures, as is shown in the experiments.

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Place your company logo here on slide master CONTENTS 1. Motivation 2. Integration  Single Stage 48 V to 1 V PoL Topology  Semiconductors  Vertical GaN-MOSFET  Lateral Si-Capacitor  Chip-to-Chip Bonding Technology 3. Module Design Concepts 4. Experiments on Ag-to-Ag Direct Bonding 5. Conclusion