This work focuses on the impact of oxidizing and reducing ash chemistries on the modifications of two porous SiOCH films with varied porosities (8% [low porosity (lp)-SiOCH] and 45% [high porosity (hp)-SiOCH]). The ash processes have been performed on SiOCH blanket wafers in either reactive ion etching (RIE) or downstream (DS) reactors. The modifications of the remaining film after plasma exposures have been investigated using different analysis techniques such as x-ray photoelectron spectroscopy, Fourier transform infrared spectroscopy (FTIR), x-ray reflectometry, mercury probe capacitance measurement (C-V), and spectroscopic ellipsometry (SE). FTIR analyses show that the lp-SiOCH film is not significantly altered by any of the ash processes investigated (DS-H2∕He, RIE-O2, and RIE-NH3), except by downstream oxidizing plasmas (DS-O2 or DS-N2∕O2) which induce some carbon depletion and moisture uptake, resulting in a slight increase of the k value. The porosity amplifies the sensitivity of the material to plasma treatments. Indeed, hp-SiOCH is fully modified (moisture uptake and carbon depletion) under oxidizing downstream plasma exposures (DS-O2 and DS-N2∕O2), while it is partially altered with the formation of a denser and modified layer (40–60nm thick), which is carbon depleted, hydrophilic, and composed of SiOxNyHz with RIE-NH3 and DS-N2∕H2 plasmas and SiOxHy with RIE-O2 plasma. In all the cases, the k value increase is mainly attributed to the moisture uptake rather than methyl group consumption. hp-SiOCH material is not altered using reducing DS chemistries (H2∕He and H2∕Ar). The porous SiOCH film degradation is presented and discussed with respect to chemistry, plasma parameters, and plasma mode in terms of film modification mechanism.

No abstract

3nm HfO,, PDA 600°C FG 425°C sub p This paper investigates interface states in HfOz devices with metal gate. First we studied the nature of these defects. The SiiSiO, interface of SiOJHfUl stacks is modified by RTP at high temperature but after a 9OOOC RTP, it is similar to Si interface of conventional SiOz capacitors. Moreover, we show that higher temperatures of forming gas anneals FGA (530°C) are required to passivate interface defects of HKl2 capacitor devices compared to 5 0 2 . In a complete MOSfet process flow, T425"C is however high enough to passivate interface states, Moreover, for the first time, we performed atomic H' plasma annealing of HfD2/TiN stacks which drastically reduces the Dit down to 2-3.10'0 /cm'/eV. The generation of interface states is finally investigated. The degradation of the interface does not depend on the initial density of Dit and partial recovery of Dit is observed after stress interruption. Higher device lifetimes in term of NBTI and breakdown are then expected for 530°C FGA devices

No abstract