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Metal oxide semiconductor transistors with two polycrystalline silicon layers, one for the gate and one for the source/ drain leads were realized. This was done for the purpose of allowing a high temperature anneal (-950~ of the devices after a Fowler-Nordheim tunneling stress in order to investigate the dynamics of the annealing of interface states and oxide bulk trapped charge which resulted from the tunneling stress. It was found that the stress-generated interface states are completely annealed by the thermal treatment, but the generation rates and saturation values as a result of repeated stress after the high temperature anneal, are a strong function of the anneal temperature and time. Their magnitudes significantly exceed the values of the fresh devices with inverse dependence on the anneal time. In addition the saturation value of the interface states density depends strongly on the saturation value of the bulk traps at the end of the previous stress, prior to the anneal. A model is proposed to explain this correlation and its plausibility is examined.

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A Self-Assembly oriented technique from the vapor-phase, Molecular Layer Epitaxy (MLE), was utilized for the buildup of organic multilayers as the active channel in organic field effect transistors (OFET). Carrier gas-assisted chemical vapor deposition (CVD) of 1,4,5,8-naphthalene-tetracarboxylic-dianhydride (NTCDA) and an aliphatic spacer are used in a pulsed mode for the covalent attachment of a single monolayer at a time resulting in an ordered dense multilayer film. The MLE approach uses a template layer to promote coupling between the substrate and the precursors deposited from the vapor phase. Interlayer epitaxy is governed by self-limiting vapor-phase condensation reactions while intra-layer ordering is achieved via horizontal π-stacking. Resulting multilayers were characterized by means of contact angle, variable angle spectroscopic ellipsometry (VASE), AFM, absorbance in the UV-vis.-NIR and FTIR. Multilayer structures are also built on a silicon substrate with predefined gold electrodes, using a self assembled template layer on the electrodes and on the thin gate oxide, thus allowing for the buildup of a multilayer structure covering both the electrodes and the channel area while enhancing the nature of the contact between the multilayer and the source and drain electrodes. Resulting OFET devices show n-type conductivity with a mobility of 0.031 cm2 V-1 s-1 for a 6nm thickness MLE film, thus justifying the utilization of the technique in OFETs research and applications.

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