No abstract

In this paper, novel ultra low voltage (ULV) dual-rail NOR gates are presented which use the semi-floating-gate (SFG) structure to speed up the logic circuit. Higher speed in the lower supply voltages and robustness against the input signal delay variations are the main advantages of the proposed gates in comparison to the previously reported domino dual-rail NOR gates. The simulation results in a typical TSMC 90 nm CMOS technology show that the proposed NOR gate is more than 20 times faster than conventional dual-rail NOR gate. KeywordsUltra Low Voltage (ULV), Semi-Floating-Gate (SFG), Speed, NOR Gate, Monte Carlo, TSMC 90 nm, CMOS

No abstract

In this paper we present a semi-floating-gate (SFG) multiplevalued (MV) latch. The latch is constructed for handling signals that can be binary or multiple-valued, with only SFG multiple-valued inverters. Simulation results are provided.

No abstract