A novel multiple-input multiple-valued semi-floating-gate latch

Mirmotahari, Omid; Berg, Y.

doi:10.1109/ismvl.2003.1201410

Cited by 8 publications

(11 citation statements)

References 8 publications

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“…The work in this thesis is possible thanks to the development of Semi Floating-Gate (SFG) Latches [19] by Mirmotahari et al and SFG inverters [20] introduced by Berg et al SFG inverters are recharged volatile floating-gate inverters exploiting multiple-input multiple-valued floating-gate transistors [21]. Multiple-valued encoders using SFG devices are presented in [17] and [16].…”

Section: Related Workmentioning

confidence: 99%

Serial semi floating gate MOS D/A converter with configurable resolution

Jensen¹,

Berg²

2004

2004 IEEE Region 10 Conference TENCON 2004.

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I wish to thank my supervisors Professor Yngvar Berg and Associate Professor Dag T. Wisland for their guidance and encouragement while working on the project. Professor Berg was the one who introduced me to the interesting fields of floating-gate circuits and multiple-valued logic. Both supervisors have given invaluable help in practical as well as in academic terms. Above all though, you have believed in my project and my ability to complete it. My fellow PhD-students Johannes G. Lomsdalen, Henning Gundersen and Omid Mirmotahari have willingly shared their experiences. Our many long conversations have been valuable and inspiring. I would like to thank all of you for the time we have worked together as colleagues, first at MSc level and later at PhD. It has been a good period of my life both academically and socially. I would also like to thank the rest of my colleagues in the Department of Informatics who have contributed. In particular Snorre Aunet, Øivind Naess and Mads Høvin. Finally, I would like to thank everyone else who has helped make this thesis a reality.

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Section: Related Workmentioning

confidence: 99%

Serial semi floating gate MOS D/A converter with configurable resolution

Jensen¹,

Berg²

2004

2004 IEEE Region 10 Conference TENCON 2004.

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“…A neuron-MOS device is a novel functional transistor with multiple-input gates, and is characterized by a variable threshold voltage achieved by controlling the voltages of the multiple-input gates [1]. As a circuit available in standard CMOS technology, floating-gate circuits have found wide use in microelectronics [2][3][4][5][6][7][8]. A neuron-MOS transistor-based S/H circuit has some favorable properties, such as a simple structure and low power consumption, etc [2,3].…”

Section: Introductionmentioning

confidence: 99%

“…In [3], a new S/H scheme using an analog multiple valued floating-gate inverter [4] is presented. This new proposal consumes less die area, less power and experiences increased linearity compared to traditional floating-gate latch-based scheme [5]. However, the performance of this circuit is related to the slope in the working point of the inverter's DC transfer characteristics.…”

Section: Introductionmentioning

confidence: 99%

A novel S/H circuit based on clock-controlled neuron-MOS transistor

Hang

Wang

2010

The 2nd International Conference on Information Science and Engineering

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A new sample and hold (S/H) circuit using clock-controlled neuron-MOS transistor is presented. By employing a threshold compensation cell, the problem of threshold loss between the input voltage and the output voltage of a single neuron-MOS transistor-based source-follower, is solved, and thereby the accuracy of the circuit is improved. Due to applying threshold compensation technique, the proposed S/H circuit is suitable for low-voltage operation. Besides, by utilizing a high-functionality clock-controlled neuron-MOS transistor, the proposed S/H circuit has considerable simpler structure and achieves higher power saving than conventional implementations. double-polysilicon CMOS technology validate the effectiveness of the proposed approach. Finally, a comparison is being made between the proposed circuit and previously reported ones.

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“…The potential improvement of recharge MV logic is presented in [5]. The recharge signal can creatively be used to obtain a latching function without adding any complexity to the gates [6]. It is also important to pinpoint that the recharging of the floatinggate has not always made it easier to implement MVL functions, e.g.…”

Section: Introductionmentioning

confidence: 99%