The links of network on chip(NOC) power dissipation compete with the power dissipation of other elements of the communication subsystem, namely, the routers and network interfaces(NIs). A set of data encoding schemes aimed at reducing the power dissipation in the links of anNoC. Self switching activity and coupling switching activity are responsible for reducing the power dissipation. Thus, both the switching activities with the three data encoding schemes has been proposed to reduce the power dissipation and energy consumption. Experiments carried out on both synthetic and real traffic scenarios and it shows the effectiveness of the proposed schemes, which allow to reduce the power dissipation and energy consumption.
Testing of modern IC devices involves three process: 1. Test pattern generation, 2. Test pattern compaction, 3. Test pattern application. Test patterns are generated in first phase, compressed in second phase and applied to DUT (Device under Test). The response of DUT is compared with actual response in order to analyze the device's behaviors. Earlier part of modern device evolves with digital circuits. But most of modern IC's in today's technology comes with both analog (ADC) and digital elements (DAC). There are many scheme's has been developed for digital circuits than analogue circuits. Testing of analogue circuits are more difficult than digital circuits since the analog test involves more parameter than digital testing. So there is need of efficient test compression. The survey of this paper is focused on test compression techniques and its analysis on methodology, test patterns, run time on various analogue & mixed signal circuits.
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