Phone: 334 727 8994, Fax: 334 724 4806.Current-voltage (I-V) characteristics and electroluminescence spectra of several ultraviolet and blue light-emitting diodes (LEDs) emitting nominally at 380, 400, 430, and 468 nm were studied. These diodes exhibited an Ohmic regime at low forward biases; then the current increased sharply as bias increased. Several changes in the slope of logarithmic I-V plots indicated that, I / V x . These changes in the slope were interpreted as single-carrier space-charge-limited (SCL) transport across the diode active region. As bias increased the deep states were filled and for the 400-and 468-nm diodes ideality factors of $2 were obtained. This indicated that, as bias increased the transport mechanism changed from SCL conduction to recombination of injected carriers in the spacecharge region. For the 380-and 430-nm diodes, ideality factors >>2 were obtained, although the observed electroluminescence spectrum indicated substantial radiative recombination. For the diode emitting at 430 nm, several peaks including the major peak at $424 nm appeared to have resulted from transitions between the conduction-band edge and deep states, identified from the I-V characteristics, likely to be associated with Zn doping of the InGaN active region. Deep states in the other diodes appeared to be ineffective in the radiative recombination process.

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In this paper, we have explored the response of bipolar junction transistors (BJT) to the controlled application of mechanical stress. Mechanical strains and stresses are developed during the fabrication, assembly and packaging of the integrated circuit (IC) chips. Due to these stresses and strains, it has been observed by many researchers that changes can occur in the electrical performance of both analog and digital devices. Stress-induced device parametric shifts affect the performance of analog circuits that depend upon precise matching of bipolar and/or MOS devices, and can cause them to operate out of specifications. In the past the authors have extensively investigated the stress effects on resistors embedded on integrated chips and were successful in characterizing die stresses for various packaging architectures. We have also observed stress effects on diodes, field effect transistors (FETs), van der Pauw structures and CMOS sensor arrays. In this present work, the stress dependence of the electrical behavior of bipolar transistors has been investigated. Test structures have been utilized to characterize the stress sensitivity of vertical bipolar devices fabricated on (100) silicon wafers. In the experiments, uniaxial normal stresses were applied to silicon wafer strips using a four-point-bending fixture. An approximate theory has also been developed for stress-induced changes in the current gain of bipolar junction transistors. Both the theoretical and experimental results show similar trend for DC current gain vs. stress plots. Multi-Physics based finite element simulations (coupled electro-mechanical-thermal) have been performed to understand the device level mechanisms that cause the stress induced changes in the BJTs and also to characterize and model stress dependence of fundamental silicon material parameters such as bandgap, intrinsic carrier concentration, and electron/hole mobilities. In the future, the developed formulations can be applied to theoretically optimize transistor design, placement, orientation, and processing to minimize the impact of fabrication and packaging induced die stresses.

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