GaN technology is on the advance for the use in power ICs thanks to space-saving integrated circuit components and the increasing number of integrated devices. This work experimentally investigates a number of key building blocks for GaN power integration. First, an overview of the active and passives devices of the technology is given with focus on area-efficient layouts for power transistors and limitations of on-chip capacitors and inductors with comparison to other IC technologies. Digital and analog basic circuits as part of device libraries are examined and optimized with regard to area-efficiency. The NOT gates have active areas as low as 56.7 µm 2 and max. static currents of 0.12 mA with high noise margins. Further digital gates are presented. For the analog circuits, differential amplifiers and voltage reference concepts are presented and compared. Finally, GaN power integration is discussed, and integration levels are defined and described. The GaN technology is compared with other IC technologies, and future challenges and perspectives are shown. GaN power integration based on building blocks aims to exploit the full potential of the lateral GaN technology in order to compete with Si-based IC technologies in the future.INDEX TERMS Gallium nitride, integrated circuit technology, power integrated circuits, logic circuits, analog circuits
In this work, multi-finger current aperture vertical electron transistors (CAVETs) are fabricated with co-integrated high electron mobility transistors (HEMTs). The devices are realized by Mg-ion implantation and metalorganic chemical vapor deposition (MOCVD) regrowth. The intrinsic CAVET design is optimized for robust device performance and applied on multi-finger devices having a total gate periphery of W G = 13.5 mm and W G = 77 mm. Mappings of the transfer characteristics revealed reliable turn-off behavior demonstrating the suitability of the intrinsic device layout. The largest CAVETs revealed a total ON-state resistance of R ON = 1.67 and a maximum drain current of I D,MAX = 20.3 A at V GS = 3 V. A pulse robustness of P PULS = 976 W at V DS = 50 V and a pulsewidth of 500 μs is shown without thermal destruction. Additionally, HEMTs are co-integrated on-chip. This combination of HEMTs and reliable large area CAVETs enables the design of highperformance, monolithically integrated GaN power circuits (GaN power ICs) based on the CAVET technology. Index Terms-Current aperture vertical electron transistor (CAVET), GaN, power electronics, vertical transistor.
I. INTRODUCTIONG aN-BASED devices offer great potential for high power switching applications due to their superior physical properties, compared to Si and SiC [1], [2]. The most investigated AlGaN/GaN high electron mobility transistor (HEMT) has already entered the high-power and high-frequency electronics market [3], [4]. However, for high power applications, the lateral technology suffers from high gate-to-drain spacing to sustain high voltage operation. In contrast, vertical
In this work, the off-state characteristics of AlScN/GaN high electron mobility transistors (HEMTs) grown by metalorganic chemical vapor deposition (MOCVD) were studied and directly compared to an AlGaN- and an AlN-HEMT grown in the same MOCVD. Pinch-off instability and leaky capacitive measurements were observed for AlScN-based HEMTs, which was correlated with a higher ideality factor and lower effective potential barrier height than the AlGaN and AlN-HEMTs. However, the reverse bias characteristics exhibited a sudden drain-current increase without a significant increase in gate-leakage current. The drain-leakage current is assumed to be related to a parasitic channel across the AlScN-barrier as a result of trap-assisted carrier transport with a Poole–Frenkel characteristic. The demonstrated pinch-off instability led to significant gain expansion in load-pull measurements and early soft-breakdown, which, in turn, limits the achievable voltage-margin. The results demonstrate a key issue to reveal the full potential of AlScN-based HEMTs for mm-wave applications.
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