In spike sorting systems, front-end electronics is a crucial pre-processing step that not only has a direct impact on detection and sorting accuracy, but also on power and silicon area. In this work, a behavioural front-end model is proposed to assess the impact of the design parameters (including signal-to-noise ratio, filter type/order, bandwidth, converter resolution/rate) on subsequent spike processing. Initial validation of the model is provided by applying a test stimulus to a hardware platform and comparing the measured circuit response to the expected from the behavioural model. Our model is then used to demonstrate the effect of the Analogue Front-End (AFE) on subsequent spike processing by testing established spike detection and sorting methods on a selection of systems reported in the literature. It is revealed that although these designs have a wide variation in design parameters (and thus also circuit complexity), the ultimate impact on spike processing performance is relatively low (10-15%). This can be used to inform the design of future systems to have an efficient AFE whilst also maintaining good processing performance.