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Modeling a MEMS (Micro Electro-Mechanical Systems) electrostatic actuator in electrical domain is important for system simulation of the actuator along with its associated electronics. For instance, an integrated MEMS resonator used in a serial I/O PLL design modeled in electrical domain enables to optimize the system with the rest of the electronics. In this work, we have developed a simplified equivalent circuit model for MEMS electrostatic actuator and simulated it using Natspice, a U.C. Berkeley SPICE3f5-based in-house circuit simulator. The equations governing the actuator are implemented using coupled RL and RLC circuit, defined in SPICE and Verilog-A. Natspice simulation results are presented and compared with Matlab results which show very high correlation. A system consisting of an array of MEMS devices can be quickly simulated using this simplified model.

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A significantly increased subthreshold leakage is observed in devices with high-k gate dielectric due to gate fringing field effects. Further, the drain to body band-to-band tunnelling leakage (BTBT) current also increases with the value of dielectric constant (k ), particularly for high-k p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs). We show that this increase with k is due to a gate-todrain fringing field induced increase in the local electric field, across the gate overlap region of drain junction. Due to these reasons, the circuit technique of applying an optimum body bias to minimize the total leakage, is least effective in high-k p-MOSFETs. Our results also show that, because of the degraded subthreshold characteristics in high-k MOSFETs, the effectiveness of body bias in controlling the gate leakage is further reduced for scaled CMOS technologies employing high-k gate dielectric.

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