Transition to lead-free solder materials has raised concerns over the reliability of lead-free

Soldering is extensively used to assemble electronic components to printed circuit boards or chips to a substrate in microelectronic devices. These solder joints serve as mechanical, thermal and electrical interconnections, therefore, their integrity is a key reliability concern.However, newly introduced lead-free solders do not have a long history of applications in the industry and there is a lack of established material models of their behaviour over the wide temperature range experienced by electronics systems. Therefore, an extensive reliability study is required before introducing a new lead-free solder material in the electronic industries. Moreover, most of the solder materials have low melting temperatures, and are prone to creep in service. The cyclic temperature operating condition (powercycling) of the solder joint can result in the creep fatigue failure. Thus, a computational technique is used to investigate creep damage in solder joints. The present paper deals with creep damage of leadfree solder joints for powercycling using finite element analysis with the consideration of experimentally observed non-uniform temperature distributions in the 1206 surface mount chip resistor. In addition, a comparison is made for inelastic strain accumulation and fatigue life for creep damage study for spatially uniform and non-uniform temperature powercycling.

Abstract:The paper presents the study of non-uniform temperature distributions in a flip chip electronic assembly, and the use of these temperature distributions to analyse the thermal stresses in lead-free solder joints in surface mount devices. The thermal stresses in the solder joints are mainly due to the mismatch in the coefficients of thermal expansions between the component and substrate materials, and temperature gradient in the electronic assembly. The thermo-elasto-visco-plastic finite element analysis is carried out to investigate the extent of thermal stresses induced in solder joints between a surface mount component and a FR4 circuit board (substrate) under conditions of thermal cycling with the chip resistor operating at its full power condition. Three different cases of spatial temperature distributions are considered including one with an experimentally obtained non-uniform temperature distribution. A comparative study of thermal stresses is performed using a near-eutectic SnAgCu solder material for three different thermal cases.

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• This is a conference paper AbstractIt is well known that in surface mount technology (SMT), thermal strains in electronic assemblies are induced in the solder joints by the mismatch between the coefficients of thermal expansion (CTE) of the components, substrate and solder, both during their processing and in service. Therefore, thermo-mechanical damage is likely to occur in the solder and the principle reliability hazard in SMT assemblies is the resulting fatigue cracking of the solder fillet, caused by cyclic thermal stresses. These stresses may be caused by both cyclic variations in power dissipation within equipment and by external environmental temperature changes. Most work reported to date has focused on the effects of environmental temperature changes, although for many types of equipment power cycling may result in significant stresses. The present paper describes the experimental determination of the actual temperature distribution in a chip resistor assembly when it is powered. The paper also discusses the significance of such experimentally determined non-uniform temperature distributions in electronic assemblies to fatigue damage accumulation due to both power cycling and to cyclic variations in the ambient temperature whilst the chip resistor is powered. This fatigue damage accumulation study is carried out using finite element analysis.