Non-volatile computing-in-memory macros that are based on two-dimensional arrays of memristors are of use in the development of artificial intelligence edge devices. Scaling such systems to three-dimensional arrays could provide higher parallelism, capacity and density for the necessary vector–matrix multiplication operations. However, scaling to three dimensions is challenging due to manufacturing and device variability issues. Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal–oxide–semiconductor process. Our macro can perform 3D vector–matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm–2. We show that the macro offers more accurate brain MRI edge detection and improved inference accuracy on the CIFAR-10 dataset than conventional methods.

In this study, the negative DIBL (N-DIBL), negative differential resistance (NDR), and Miller effect of a negative capacitance nanowire filed-effect-transistor (negative capacitance (NC) NWFET) were analyzed by employing the custom-built SPICE model. In the simulation, the minimum subthreshold swing (SS) reduced to 40 mV/decade with negligible hysteresis, and the on-current amplified by approximately three times. The N-DIBL effect was analyzed by building a model, and the results indicated that the N-DIBL is negatively correlated with the SS. Hence, it is indispensable to make trade-offs between the N-DIBL and SS in NC NWFET applications. Moreover, the Miller effect of a NCFET-based inverter was investigated for the first time. The Miller effect of the NC NWFET-based inverter was considerably improved owing to a high on-current and negative internal gate voltage (when external gate voltage is set to 0V), which is beneficial for high-speed circuit building based on NC NWFETs. The overshoot of the NC NWFET-based inverter is ~43.1% less than that of the NWFET-based inverter, and the propagation delay of the NC NWFET-based inverter is ~73.1% less than that of the NWFET-based inverter at ferroelectric thickness TFE=3nm.

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