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When mirror-polished, flat, and clean wafers of almost any material are brought into contact at room temperature, they are locally attracted to each other by van der Waals forces and adhere or bond. This phenomenon is referred to as wafer bonding. The most prominent applications of wafer bonding are silicon-on-insulator (SOI) devices, silicon-based sensors and actuators, as well as optical devices. The basics of wafer-bonding technology are described, including microcleanroom approaches, prevention of interface bubbles, bonding of III-V compounds, low-temperature bonding, ultra-high vacuum bonding, thinning methods such as smart-cut procedures, and twist wafer bonding for compliant substrates. Wafer bonding allows a new degree of freedom in design and fabrication of material combinations that previously would have been excluded because these material combinations cannot be realized by the conventional approach of epitaxial growth.

Si, Ge, SiC, and diamond samples were implanted with H 2 ϩ at 120-160 keV with 5.0 ϫ10 16 ions/cm 2 ͑corresponding to 1.0ϫ10 17 H ϩ ions/cm 2) and annealed at various temperatures to introduce hydrogen filled microcracks. An effective activation energy was determined for the formation of optically detectable surface blisters from the time required to form such blisters at various temperatures. The measured effective activation energies are close to the respective bond energies in all four materials. The time required to completely split hydrogen implanted layers from bonded silicon substrates and to transfer them onto oxidized silicon wafers is a factor of about 10 longer. Both processes, blister formation and layer splitting, show the same activation energy.

In advanced microsystems various types of devices (metal-oxide semiconductor field-effect transistors, bipolar transistors, sensors, actuators, microelectromechanical systems, lasers) may be on the same chip, some of which are 3D structures in nature. Therefore, not only materials combinations (integrated materials) are required for optimal device performance of each type but also process technologies for 3D device fabrication are essential. Wafer bonding and layer transfer are two of the fundamental technologies for the fabrication of advanced microsystems. In this review, the generic nature of both wafer bonding and hydrogen-implantation-induced layer splitting are discussed. The basic processes underlying wafer bonding and the layer splitting process are presented. Examples of bonding and layer splitting of bare or processed semiconductor and oxide wafers are described.

NEC Corporation assisted in meeting the publication costs of this article.ABSTRACT Si-OH groups can polymerize to form strong covalent Si-O--Si bonds at low temperatures. Based on this behavior a model for hydrophilic Si wafer bonding is suggested which allows significant increase of bonding strength by low-temperature annealing. A possible extension of this model to materials other than Si is discussed. Methods to prevent generation of interface bubbles during the low-temperature annealing are presented. The low-temperature bonding approach has been employed in layer transfer applications such as an ultrathin silicon-on-insulator layers by an implanted carbon etch stop, single-crystal Si layer on quartz, glass, or sapphire. Analysis of thermal peeling stresses in bonded pairs of dissimilar materials led to the development of bonding and heating-cooling schedules as well as a low vacuum bonding method to avoid peeling during annealing and subsequent thinning (etching). ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 131.111.185.72 Downloaded on 2015-04-06 to IP