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Overvoltage ruggedness is an essential reliability requirement for non-avalanche AlGaN/GaN power devices against inductive transient spikes in the OFF-state breakdown events. In this work, we first report the 3rd-quadrant (i.e. source-to-drain reverse operation) overvoltage ruggedness of the p-gate GaN high-electron-mobility transistors (HEMTs) by performing static current-voltage (I-V) sweeps and dynamic unclamped-inductive-switching experiments. Both experimental results reveal an inferior breakdown performance of the device under 3rd-quadrant blocking conditions, including a low static voltage of 98 V and a dynamic breakdown voltage (BV) of 155 V. In particular, this transient voltage is evidently degraded from 155 V to 114 V (i.e. a 26% reduction) by increasing the load current, which is significantly different from the stable BV (1.4 kV) achieved in the 1st-quadrant dynamic breakdown. Such unusual degradation behavior can be explained by the trapping-related carrier transport mechanism, which is supported by temperature-dependent breakdown characteristics. Further numerical simulations, de-capsulation failure analyses and repeated UIS experiments are carried out to study the failure mechanism and gain insight into the overvoltage capability of the device. These results suggest that the rational design of the p-gate GaN HEMTs with the desired 3rd-quadrant overvoltage ruggedness requires careful consideration, especially in reverse conduction events

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