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An LMS-based algorithm to monitor fetal and maternal heart rate in real time was implemented and evaluated on a development platform. Hardware has three modules: dsPIC30F digital signal controller, a low-noise analog front end and a storage stage. They were evaluated using on-chip debugging tools and a patient simulator. Algorithm performance was tested using simulation tools and real data. Other measures like process run-times and power consumption, were analyzed to evaluate the design feasibility. Dataset was conformed by 25 annotated records from different gestational age pregnant women. Sensitivity and accuracy were used as performance measures. In general, sensitivity was high for maternal (95.3%) and fetal (87.1%) detections. Results showed that the chosen architecture can run efficiently the algorithm processes, obtaining high detection rates under appropriate SNR conditions.

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