A T-gate structure has been implemented in the fabrication of fully depleted silicon-on-insulator MOSFETs. The T-gate process is fully compatible with the standard CMOS and the resulting reduction of gate-resistance significantly improved the RF performance. Measured max is 76 GHz and 63 GHz for n-and p-MOSFET with 0.2-m gate length, respectively. At 2 GHz, a minimum noise figure of 0.4 dB was measured on an n-MOSFET with the T-gate structure.

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A design procedure is presented for a hardware efficient FIR Compensation Filter as a component in a Delta Sigma Modulator Analog to Digital Converter using cascaded Sinc low pass filters. The combination of the Sinc Low Pass Filters and the hardware efficient FIR compensation filter results in a 21% saving in hardware (chip area) compared to a single FIR low pass filter.

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