The incorporation of phosphorus in silicon is studied by analyzing phosphorus δ-doped layers using a combination of scanning tunneling microscopy, secondary ion mass spectrometry and Hall effect measurements. The samples are prepared by phosphine saturation dosing of a Si(100) surface at room temperature, a critical annealing step to incorporate phosphorus atoms, and subsequent epitaxial silicon overgrowth. We observe minimal dopant segregation (~5 nm), complete electrical activation at a silicon growth temperature of 250 °C and a high two-dimensional electron mobility of ~10 2 cm 2 /Vs at a temperature of 4.2 K. These results, along with preliminary studies aimed at further minimizing dopant diffusion, bode well for the fabrication of atomically precise dopant arrays in silicon such as those found in recent solid-state quantum computer architectures. From Moore's Law it is well-known that the number of transistors on a chip doubles approximately every 18 months.1 In order to maintain this trend alternative means of fabricating devices are actively being pursued 2 and it is clear that the ability to fabricate atomically precise structures in silicon is becoming increasingly important. It is also important to characterize the spatial and electrical distribution of the dopant atoms. This is especially the case for a number of proposals to fabricate atomically precise dopant arrays in silicon for the fabrication of silicon based quantum computers. [3][4][5] In these architectures the dopant atom is required to be electrically active. The free electron of each dopant can then either act directly as the quantum bit 5 or mediate the coupling between quantum bits. 3,4Recent results have demonstrated that a precise array of phosphorus bearing molecules can be fabricated on a silicon surface using a hydrogen resist based strategy. 6 The next important step for creating ordered dopant arrays in silicon devices, which has not yet been demonstrated, is to encapsulate the dopants in high quality epitaxial silicon without disturbing the array. This step must aim at choosing an optimal substrate temperature to minimize dopant diffusion and surface segregation during growth, while maintaining a high structural quality of the epitaxial layer.While numerous publications exist on B and Sb δ-doping in Si, 7,8 P δ-doping has been applied only recently to the fabrication of SiGe tunneling diodes.9,10 These devices are of great interest for digital and high frequency applications due to their negative differential resistance. However, high peak to valley current ratios of about 5 have to be achieved for realistic applications, which requires minimal diffusion of the dopants in the device.9 This has only recently been demonstrated in the fabrication of SiGe tunneling diodes, where P δ-doped layers are fabricated with a GaP solid dopant source. 9,10 This Letter describes recent progress in the low temperature encapsulation of phosphorus dopants in silicon and represents one of the first demonstrations of P δ-doping using phosphine gas a...

We demonstrate time-resolved control and detection of single-electron transfers in a silicon device implanted with exactly two phosphorus donors. Charge state relaxation at millikelvin temperature is shown to be dominated by phonon emission and background charge fluctuations for low energies, while higher-order processes take over at higher energies. Our results reveal relaxation times for single-donor charge states of several milliseconds, which have significant implications for single-atom nanoelectronics.