A mechanism is proposed to explain depolarization phenomena that have been observed in thin ferroelectric films and related multilayer devices. It is shown that, for a short-circuited electrode-ferroelectric structure, incomplete compensation of the ferroelectric polarization charge results when the center of gravity of this charge and the free compensation charge are not coincident. Depolarization fields in the ferroelectric arising from such incomplete compensations are estimated. A simple switching calculation shows such fields to be of sufficient strength to account for the initial polarization decay rate observed in Pb0.92Bi0.07La0.01 (Fe0.405Nb0.325Zr0.27)O3 films. The results of measurements involving changes in film thickness, electron concentration in the electrodes, and contact materials will be discussed and shown to be consistent with the mechanism proposed.

Highly conductive copper nanowires (CuNWs) are essential for efficient data transfer and heat conduction in wide ranging applications like high-performance semiconductor chips and transparent conductors. However, size scaling of CuNWs causes severe reduction in electrical and thermal conductivity due to substantial inelastic surface scattering of electrons. Here we report a novel scalable technique for low-temperature deposition of graphene around CuNWs and observe strong enhancement of electrical and thermal conductivity for graphene-encapsulated CuNWs compared to uncoated CuNWs. Fitting the experimental data with the theoretical model for conductivity of CuNWs reveals significant reduction in surface scattering of electrons at the oxide-free CuNW surfaces, translating into 15% faster data transfer and 27% lower peak temperature compared to the same CuNW without the graphene coating. Our results provide compelling evidence for improved speed and thermal management by adapting the Cu-graphene hybrid technology in future ultrascaled silicon chips and air-stable flexible electronic applications.

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Graphene is a promising ultra-thin barrier against undesired mass transport, however, the high deposition temperatures or the defect inducing post-deposition transfer processes limit its widespread applicability. Herein we report on the successful blocking of copper (Cu) ion diffusion by large area multi-layer graphene (MLG) membranes deposited directly on silicon oxide (SiO) via low temperature plasma-enhanced chemical vapor deposition. The barrier strength of MLG is compared to evaporated tantalum (Ta) by applying positive bias-temperature stress (BTS) to Cu/barrier/SiO/Si test structures. After constant BTS of 4 × 10 V cm at 400 K for 50 min, the MLG barrier device exhibits a negligible flat band voltage shift in capacitance-voltage measurements and no discernible current peak in triangular voltage scans, whereas the Ta barrier allows significant Cu ion transport. Highly limited Cu ion diffusion through MLG suggests that lower energy diffusion paths, like grain boundaries and defects of individual graphene layers, do not align in the direction of an applied stress field. In general, the presented low-temperature direct growth MLG membranes can block undesirable diffusion in many applications, and are especially suitable as Cu diffusion barriers in integrated circuit chips, photovoltaic cells and flexible electronic devices.