For many years, lithographic resolution has been the main obstacle for keeping the pace of transistor densification to meet Moore's Law. For the 45 nm node and beyond, new lithography techniques are being considered, including immersion ArF lithography (iArF) and extreme ultraviolet (EUV) lithography. As in the past, these techniques will use new types of photoresists with the capability to print 45 nm node (and beyond) feature widths and pitches.In a previous paper ("SEM Metrology for Advanced Lithographies," Proc SPIE, v6518, 65182B, 2007), we compared the effects of several types of resists, ranging from deep ultraviolet (DUV) (248 nm) through ArF (193 nm) and iArF to extreme UV (EUV, 13.5 nm). iArF resists were examined, and the results from the available resist sample showed a tendency to shrink in the same manner as the ArF resist but at a lower magnitude.This paper focuses on variations of iArF resists (different chemical formulations and different lithographic sensitivities) and examine new developments in iArF resists during the last year. We characterize the resist electron beam induced shrinkage behavior under scanning electron microscopy (SEM) and evaluate the shrinkage magnitude on mature resists as well as R&D resists. We conclude with findings on the readiness of SEM metrology for these challenges.

For many years, lithographic resolution has been the main obstacle in keeping the pace of transistor densification to meet Moore's Law. For the 45 nm node and beyond, new lithography techniques are being considered, including immersion ArF (iArF) lithography and extreme ultraviolet lithography (EUVL). As in the past, these techniques will use new types of photoresists with the capability to print 45 nm node (and beyond) feature widths and pitches.In a previous paper [1], we focused on ArF and iArF photoresist shrinkage. We evaluated the magnitude of shrinkage for both R&D and mature resists as a function of chemical formulation, lithographic sensitivity, scanning electron microscope (SEM) beam condition, and feature size. Shrinkage results were determined by the well accepted methodology described in ISMI's CD-SEM Unified Specification [2].A model for resist shrinkage, while derived elsewhere [3], was presented, that can be used to curve-fit to the shrinkage data resulting from multiple repeated measurements of resist features. Parameters in the curve-fit allow for metrics quantifying total shrinkage, shrinkage rate, and initial critical dimension (CD) from before e-beam exposure. The ability to know this original CD is the most desirable result; in this work, the ability to use extrapolation to solve for a given original CD value was also experimentally validated by CD-atomic force microscope (AFM) reference metrology.Historically, many different conflicting shrinkage results have been obtained among the many works generated through the litho-metrology community. This work, backed up by an exhaustive dataset, will present an explanation that makes sense of these apparent discrepancies. Past models for resist shrinkage inherently assumed that the photoresist line is wider than the region of the photoresist to be shrunk [3], or, in other words, the e-beam never penetrates enough to reach all material in the interior of a feature; consequently, not all photoresist is affected by the shrinkage process. In actuality, there are two shrinkage regimes, which are dependent on resist feature CD or thickness. Past shrinkage models are true for larger features. However, our results show that when linewidth becomes less than the eventual penetration depth of the e-beam after full shrinkage, the apparent shrinkage magnitude decreases while shrinkage speed accelerates. Thus, for small features, most shrinkage occurs within the first measurement. This is crucial when considering the small features to be fabricated by immersion lithography.In this work, the results from the previous paper [1] will be shown to be consistent with numerically simulated results, thus lending credibility to the postulations in [1].With these findings, we can conclude with observations about the readiness of SEM metrology for the challenges of both dry and immersion ArF lithographies as well as estimate the errors involved in calculating the original CD from the shrinkage trend.

For many years, lithographic resolution has been the main obstacle in keeping the pace of transistor densification to meet Moore's Law. For the 32 nm node and beyond, new lithography techniques will be used, including immersion ArF (iArF) lithography and extreme ultraviolet lithography (EUVL). As in the past, these techniques will use new types of photoresists with the capability to print smaller feature widths and pitches. Also, such smaller feature sizes will require thinner layers of photoresists, such as under 100 nm.In previous papers [1][2], we focused on ArF and iArF photoresist shrinkage. We evaluated the magnitude of shrinkage for both R&D and mature resists as a function of chemical formulation, lithographic sensitivity, scanning electron microscope (SEM) beam condition, and feature size. Shrinkage results were determined by the well accepted methodology described in ISMI's CD-SEM Unified Specification [2]. A model for resist shrinkage, while derived elsewhere [3], was presented, that can be used to curve-fit to the shrinkage data resulting from multiple repeated measurements of resist features. Parameters in the curve-fit allow for metrics quantifying total shrinkage, shrinkage rate, and initial critical dimension (CD) before e-beam exposure. With these parameters and exhaustive measurements, a fundamental understanding of the phenomenology of the shrinkage trends was achieved, including how the shrinkage behaves differently for different sized features. This work was extended in yet another paper [11] in which we presented a 1-D model for resist shrinkage that can be used to curve-fit to shrinkage curves. Calibration of parameters to describe the photoresist material and the electron beam were all that were required to fit the model to real shrinkage data, as long as the photoresist was thick enough that the beam could not penetrate the entire layer of resist.In this paper, we extend this work yet again to a 2-D model of a trapezoidal photoresist profile. This model thus allows CD shrinkage in thin photoresist to be solved, which is now of great interest for upcoming realistic lithographic processing. It also allows us to predict the change in resist profile with electron dose and the influence of initial resist profile on shrinkage characteristics. In this work, the results from the previous paper will be shown to be consistent with numerically simulated results, thus lending credibility to these papers' postulations [1,4]. Also, results from this 2-D profile model can also give clues as to how we might, in the future, model the shrinkage of contour edges of 3-D shapes.With these findings, we can conclude with observations about the readiness of SEM metrology for the challenges of future photoresist measurement, as well as estimate the errors involved in calculating the original CD from the shrinkage trend.

For many years, lithographic resolution has been the main obstacle for keeping the pace of transistor densification to meet Moore's Law. The industry standard lithographic wavelength has evolved many times, from G-line to I-line, deep ultraviolet (DUV) based on KrF, and 193nm based on ArF. At each of these steps, new photoresist materials have been used. For the 45nm node and beyond, new lithography techniques are being considered, including immersion ArF lithography and extreme ultraviolet (EUV) lithography. As in the past, these techniques will use new types of photoresists with the capability of printing 45nm node (and beyond) feature widths and pitches. This paper will show results of an evaluation of the critical dimension-scanning electron microscopy (CD-SEM)-based metrology capabilities and limitations for the 193nm immersion and EUV lithography techniques that are suggested in the International Technology Roadmap for Semiconductors. In this study, we will print wafers with these emerging technologies and evaluate the performance of SEM-based metrology on these features. We will conclude with preliminary findings on the readiness of SEM metrology for these new challenges.

A new methodology to predict changes in device performances due to systematic lithography and etch effects is described in this paper. Our methodology consists on Automatic Edge-Contour-Extraction (ECE) on Poly Over Active Layer, taking along the manufacturing variability. In general, the AMAT SEM (Scanning Electron Microscopy) ECE algorithm is based on CAD (GDS) to SEM pattern recognition, followed by CD based 2D edge extraction. Device modeling (using SPICE simulation) is used, to predict the nominal values as well as the device performances variability of the transistors drive current (Ion) and leakage current (Ioff). We used our method to compare a classical (simple rectangular) transistors and "UShape AA" transistors, both manufactured using Tower TS013LL (0.13um Low-Leakage) Platform. It was found, as predicted, that U-shape transistors have larger W distribution. However, "U-shape" also showed much tighter L distribution and the overall Ion spread is lower comparing to classical transistors. Also, UShape transistors found to have lower Lstdev (gate length distribution of each individual transistor). We also used the ECE methodology, to compare transistors of single side dog-bone to double-side dog-bone. Based on our work, we can predict that single-side dog-bone transistors, will have higher and larger Ioff distributions, and the overall Ioff speared along the wafer, will go up to a factor of x2.5.