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We demonstrated the operation of phase-change memory cells that enabled 1.

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We first report a multi-level-cell (MLC) spin-transfer torque memory (SPRAM) with series-connected magnetotunnel junctions (MTJs). The series MTJs (with different areas) show multi-level resistances by a combination of their magnetization directions. A four-level operation by spin-transfer-torque writing was experimentally demonstrated. A scheme for the write/read operation of the MLC SPRAM was also presented. A high-capacity non-volatile RAM, which enables computing systems to have a normally-off/instantly-on architecture, is a key to realizing a sustainable green IT world. SPRAM is one promising candidate because of its high-speed operation, endurance of write cycles, and compatibility (including scalability) with the standard CMOS process. We previously developed a 32-Mb chip [1]; however, its capacity was not large enough in comparison with SRAM or DRAM. In this paper, we present a MLC SPRAM with series-stacked MTJs, demonstrated its four-level operation, and devised a scheme for write/read sequence, for the first time.Configuration and operation of multi-level cell Figure 1 shows a circuit diagram of the proposed memory cell and its characteristic MLC operation. Four levels of resistance can be obtained by combining each state of two MTJs (each of which has two states and different threshold currents, I c , and different resistance variation, R). The same film configuration with two MTJs provides the same threshold current density, J c , and tunnel-magneto resistance (TMR) ratio. Therefore, the area ratio 2 of the two MTJs, for example, makes the I c and R ratios 2 and 1/2, respectively ( Fig. 2). A schematic memory-cell structure with an SEM image of the top MTJ is shown in Fig. 3. This stacked structure of two MTJs can be fabricated by a self-aligned process without additional lithography (Fig. 4). The bit-cost can be drastically reduced by stacking the MTJs, since the cost is mainly determined by the standard CMOS process (Fig. 5). Figure 6 shows the film configuration of an MgO-barrier MTJ with a synthetic ferromagnetic structure in the free layer for high immunity against disturbance [2], and Table 1 lists its characteristics. Small characteristic dispersions were obtained by optimizing the film configuration. The four-level resistances were achieved in the two MTJs (with respective areas of 70 140 and 75 150 nm) in series ( Fig. 7(a)). The thermal-stability factor E/k B T, which represents the retention of magnetic information against thermal fluctuation, was evaluated for each of the four levels (Fig. 8). When an MTJ is subjected to current density J, the magnetization reversal time p is described as [2] p = 0 exp[(E/k B T)(1-J/J co )](1) where 0 is inverse attempt frequency, and J co is critical current density at 0K. The values of E/k B T are smaller in the case of both smaller MTJ and lower I c . The cell size of MLC SPRAM can be decreased below 4F 2 /bit by increasing TMR ratio because the resistance variation of each state only depends on the size variation of MTJ (Fig. 9). Two-step write and r...