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An all-MOS linear voltage-to-frequency converter (VFC) chip with 520-kHz/V sensitivity is presented in this paper. This circuit converts an input voltage into frequency by charging and discharging a capacitor. An all-MOS voltage window comparator (VWC) with reduced propagation delay is designed to improve the linearity of traditional VFCs. The propagation delay of the VWC is discussed to resolve the tradeoff between bandwidth and linearity of VFC. The proposed VFC is verified on silicon using the Taiwan Semiconductor Manufacturing Company 1P5M 0.25-m process. The measurement results show that the linearity error is less than 1%, and the sensitivity is 520 kHz/V at an input voltage range from 0.1 to 0.8 V.Index Terms-Linearity, sensitivity, voltage window comparator (VWC), voltage-to-frequency converter (VFC).

No abstract

No abstract

An all-MOS linear voltage-to-frequency converter (VFC) chip with 520 KHz/V sensitivity is presented in this paper. This circuit converts an input voltage into frequency by charging and discharging a capacitor. An all-MOS voltage window comparator (VWC) with reduced propagation delay is designed to improve the linearity of traditional VFCs. The propagation delay of the VWC is discussed to resolve the tradeoff between bandwidth and linearity of VFC. The proposed VFC is verified on silicon using TSMC (Taiwan Semiconductor Manufacturing Company) 1P5M 0.25 m process. The measurement results show that the linearity error is less than 1%, and the sensitivity is 520 KHz/V at the input voltage range from 0.1 to 0.8 V.