Data integrity in high speed data transmission process is a major requerment that can not be ignored. High speed data transmission is prone to data errors. CRC (Cyclic Redundancy Check) is a mechanism that is often used as a detector errors in data transmission and storage process. When CRC is implemented using embedded software or processor, CRC requires many clock cycles. If CRC Generator implemented in special dedicated hardware, computational time reduced so that it can be met the high speed system communication requirement. This paper propose the design and implementation of CRC generator on FPGA that capable to minimaze computational time. The method is to reduce calculation latency by separating the coefficients of certain digits and calculating directly the result of polinomial key modulo. CRC Generator in this paper was implemented on Xilinx Spartan®-6 Series (XC6LX16-CS324). The modeling results have succeeded to finish computation on 1 clock cycle. Hardware eficiency is achieved 0.38 Gbps/Slice, while the throughput is 3,758 Gbps.
Abstrak-Ketidakpastian dalam aplikasi kontrol kemudi tidak dapat dihindari. Apabila ada perubahan parameter atau gangguan lain pada sistem, kontroler dapat menjadi tidak stabil. Desain kontroler yang diajukan berupa Linear Quadratic Tracker (LQT) untuk kemudi lateral mobil otonom dengan adanya ketidakpastian internal dari parameter massa, momen inersia, dan konstanta kekauan menikung, sehingga hasil dari penelitian ini diharapkan kontroler lebih robust terhadap ketidakpastian dan tetap dapat mengikuti input yang diberikan. Kontroler yang diajukan sudah robust terhadap variasi parameter massa dan momen inersia akibat pembobotan serta konstanta kekakuan menikung untuk roda depan dan belakang akibat perubahan tekanan udara dan ketebalan roda. Kontroler yang dijaukan juga dapat mengikuti input yang diberikan dengan eror kecil dengan adanya ketidakpastian parameter. Kata Kunci-Mobil Otonom, LQT, Robust, Ketidakpastian Parameter.
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