Abstract-An integrated voltage regulator (IVR) is. At maximum load current, 69% conversion efficiency and 1.8 V:1.2 V conversion ratio the FEOL current density reaches 22.6 and inductor current density reaches 3.21 .

Energy consumption is a dominant constraint on the performance of modern microprocessors and systems-on-chip. Dynamic voltage and frequency scaling (DVFS) is a promising technique for performing "on-the-fly" energy-performance optimization in the presence of workload variability. Effective implementation of DVFS requires voltage regulators that can provide many independent power supplies and can transition power supply levels on nanosecond timescales, which is not possible with modern board-level voltage regulator modules (VRMs) [1]. Switched-inductor integrated voltage regulators (IVRs) can enable effective implementation of DVFS, eliminating the need for separate VRMs and reducing power distribution network (PDN) impedance requirements by performing dc-dc conversion close to the load while supporting high peak current densities [2][3]. The primary obstacle facing development of IVRs is integration of suitable power inductors. This work presents an early prototype switched-inductor IVR using 2.5D chip stacking for inductor integration.Figure 23.1.1 shows the complete 2.5D chip stack. A prototype IC, fabricated in IBM's 45nm SOI process, contains buck converter circuitry, decoupling capacitance and a realistic digital load. This IC is flip-chip mounted onto an interposer that holds custom fabricated coupled power inductors for the buck converter while breaking out signals and the 1.8V input power supply to wirebond pads on the perimeter of the interposer. . The pole in both RC low-pass filters is chosen to be below f s so that the steady state amplitude of V REF,I and V FB,I is around 150mV, which gives a small signal feedback gain of ~30V/V and ensures stable loop dynamics. In steady state, V FB,I will slew behind V REF,I and the resultant evaluation of the comparator causes V BRIDGE to closely track V PWM . In the event of a large load current transient, the error in the output voltage, V OUT , will couple across C FB onto V FB,I and the comparator will react immediately to reduce overshoot in V OUT . This fast non-linear response can reduce the required decoupling capacitance on the output voltage [3]. Also residing on the IC is a 64-tile network-on-chip (NoC) consisting of four parallel, heterogeneous, physical network planes with independent frequency domains. The NoC provides realistic load behavior and supports experimentation on supply noise and DVFS. In addition, an artificial load on the IC is capable of generating large current transients with ~2A/100ps slew. A total of 48nF of deep-trench (DT) and thick oxide MOS capacitance decouples V OUT and occupies 0.40mm 2 , while 21nF of DT occupying 0.52mm 2 decouples the 1.8V input supply to compensate for the large PDN impedance.Two sets of four coupled power inductors, shown in Fig. 23.1.3, are fabricated on the silicon interposer such that one terminal of each inductor connects to a pair of V BRIDGE C4 receiving pads, while the opposite terminals are shorted and connected to several pads across the interposer for distribution of V OUT . The inductor top...

GaN grown by metal-organic chemical vapor deposition was coimplanted with Gd+ ions with energy of 155 keV and dose of 2.75×1010 cm−2 and Si4+ ions with energies of 5 and 40 keV and corresponding doses of 8×1011 and 3.6×1012 cm−2. The implanted samples were not annealed before characterization. X-ray diffraction measurements revealed that the implanted GaN exhibited no secondary phase formation or clustering effects attributable to Gd. Superconducting quantum interference device magnetometer measurements indicated that Gd- and Si-coimplanted GaN exhibited about a 400% higher magnetic moment than a Gd-implanted GaN thin film. This emphasizes the role of defects in producing large saturation magnetization in Gd-doped GaN. Both types of films displayed ferromagnetic ordering and Curie temperatures above room temperature. The higher magnetic moment was displayed when the magnetic field was applied perpendicular to the sample surface (parallel to the c-axis of the sample), suggesting the polarization field in wurtzite GaN plays a crucial role.

X-ray photoelectron spectroscopy was used to measure the energy discontinuity in the valence band ͑⌬E v ͒ of SiO 2 / InZnGaO 4 ͑IGZO͒ heterostructures deposited by low temperature plasma enhanced chemical vapor deposition and sputtering at Ͻ50°C, respectively. A value of ⌬E v = 1.43Ϯ 0.15 eV was obtained by using the Ga and Zn 2p3 and In 3d3 and 3d5 energy levels as references. Given the experimental bandgap of 3.2 eV for the IGZO, this would indicate a conduction band offset ⌬E C of 4.27 eV in this system.

GaGdN layers were grown by gas source molecular beam epitaxy with varying crystal quality and Gd concentrations as set by the Gd cell temperature. Magnetic measurements showed ferromagnetic behavior at room temperature, with the saturation magnetization dependent both on Gd concentration and crystalline quality. The Gd concentration was under the detection limit of secondary ion mass spectrometry, and estimated to be on the order of <1017at.∕cm3. As expected at this low dopant concentration, x-ray diffraction measurements showed the films to be single phase. Gd-doped samples codoped with Si to make them conducting with resistivity of 0.04Ωcm showed similar magnetic properties as Gd-doped films without addition of Si.