Characteristics of the data retention time (tRET) of nano-scale DRAM have been described. In addition, new approaches to enhance tRET and their properties have been analyzed. To optimize the process, we developed the &ET-modeling methodology, which has a good agreement with experimental data. The key feature of the methodology is an indirect probing of the tail leakage current by fitting the leakage model to reproduce the measured characteristics of the retention. The model shows the GIDL current is a major factor determining tRET of 80nm RCAT technology.
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