XPAD3S is a single-photon-counting chip developed in collaboration by SOLEIL Synchrotron, the Institut Louis Néel and the Centre de Physique de Particules de Marseille. The circuit, designed in the 0.25 microm IBM technology, contains 9600 square pixels with 130 microm side giving a total size of 1 cm x 1.5 cm. The main features of each pixel are: single threshold adjustable from 4.5 keV up to 35 keV, 2 ms frame rate, 10(7) photons s(-1) mm(-2) maximum local count rate, and a 12-bit internal counter with overflow allowing a full 27-bit dynamic range to be reached. The XPAD3S was hybridized using the flip-chip technology with both a 500 microm silicon sensor and a 700 microm CdTe sensor with Schottky contacts. Imaging performances of both detectors were evaluated using X-rays from 6 keV up to 35 keV. The detective quantum efficiency at zero line-pairs mm(-1) for a silicon sensor follows the absorption law whereas for CdTe a strong deficit at low photon energy, produced by an inefficient entrance layer, is measured. The modulation transfer function was evaluated and it was shown that both detectors present an ideal modulation transfer function at 26 keV, limited only by the pixel size. The influence of the Cd and Te K-edges of the CdTe sensor was measured and simulated, establishing that fluorescence photons reduce the contrast transfer at the Nyquist frequency from 60% to 40% which remains acceptable. The energy resolution was evaluated at 6% with silicon using 16 keV X-rays, and 8% with CdTe using 35 keV X-rays. A 7 cm x 12 cm XPAD3 imager, built with eight silicon modules (seven circuits per module) tiled together, was successfully used for X-ray diffraction experiments. A first result recently obtained with a new 2 cm x 3 cm CdTe imager is also presented.

International audienceThe X-ray pixel chip with adaptable dynamics (XPAD3) circuit is the next generation of 2D X-ray photon counting imaging chip to be connected to a pixel sensor using the bump and flip-chip technologies. This circuit, designed in IBM 0.25 μm technology, contains 9600 pixels (130 μm×130 μm) distributed into 80 columns of 120 elements each. Its features have been improved to provide high-counting rate over $10^9$ ph/pixel/mm$^2$, high-dynamic range over 60 keV, very low-noise detection level of 100e− rms, energy window selection and fast image readout less than 2 ms/frame. An innovative architecture has been designed in order to prevent the digital circuits from bothering the very sensitive analogue parts placed in their neighbourhood. This allows to read the chip during acquisition while conserving the precise setting of the thresholds over the pixel array. Finally, the aim of this development is to combine several XPAD3 to form the PIXSCAN detector

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