In this paper, a new UWB receiver architecture is proposed. Unlike a rake receiver, it does not suffer from the timing and template matching problems, and it circumvents processing at high frequencies, thereby reducing the on-chip circuit complexity and power consumption and offering simple but effective narrowband interference rejection. Simulations show that with current IC technology, the receiver only shows a slight, acceptable performance loss with respect to the ideal case.

An analog filter is designed based upon the requirement of an interference rejection filter for the Quadrature Downconversion Autocorrelation Receiver (QDAR). The transfer function of an eight-order elliptic bandpass filter is selected. As a result, a state-space approach (i.e. the orthonormal form [1]) is adopted, which is intrinsically semi-optimized for dynamic range, has low sensitivity, high sparsity and its coefficients can be physically implemented. Each coefficient in the state-space description of the filter is implemented at circuit level using a novel 2-stage gm cell based upon the principle of negative feedback. Simulation results in IBM's Bi-CMOS 0.18 µm technology show that the interference rejection filter requires a total current of 90 mA at a 1.8 V power supply. The 1-dB compression point of the filter is at 565 mV and the SNR is 47.5 dB. On performing a Monte Carlo simulation, it becomes evident that the overall filters transfer response does not suffer from process variations.