No abstract

In this paper, a hybrid multiplier circuit design employing hybrid logic style compared with transmission gates is reported. Multipliers play a crucial role in VLSI signal processing and various different applications. Area, Speed and Power are the fundamental factors in any VLSI systems. The primary goal is to enhance the general performance parameters of the multiplier such as delay, power and transistor count in comparison with the existing multipliers.The key role of hybrid logic approach is to take advantage of the features of numerous styles in an effort to enhance the general performance. The hybrid logic style including very susceptible CMOS inverters coupled with transmission gates is used inside the proposed circuit which offers high performance and occasional power design. Design metrics together with the speed, power and count of transistor are taken into consideration. All the circuits were designed the usage of Microwind device and simulated in 90nm technology. From the simulation consequences, it is determined that there's 53.4% reduction of energy and 38.9 % reduction of delay in the proposed multiplier for 1.2V power supply while compared to the present multiplier the use of transmission gates with 90nm technology.

This paper deals with “Z – source inverter for drive applications”, which provides a better solution for the drive in an industrial application by providing higher voltage buck/boost ability with effective and efficient use of supply with easy achievement of controllability at low cost using Z – Source inverter. The hardware implemented by a PIC microcontroller draws parallel operational parameters to provide the required speed and frequency. Thus PIC16F477A proves to be a potential response as a controller for Z – Source inverter and drive.