Recessed Si 0.8 Ge 0.2 source/drain (S/D) and a compressive contact etch-stop layer have been successfully integrated resulting in nearly 200% improvement in hole mobility. This is the largest reported process-induced hole mobility enhancement to the authors' knowledge. This letter demonstrates that a drivecurrent improvement from recessed Si 0.8 Ge 0.2 plus the compressive nitride layer are in fact additive. Furthermore, it shows that the mobility enhancement is a superlinear function of stress, leading to larger than additive gains in the drive current when combining several stress sources.Index Terms-MOSFET, SiGe, strained-silicon, technology computer-aided design (TCAD).

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A thermo-mechanical stress model (TMS) is presented to explain the impact of sub-melt laser anneal (LA) on SiON dielectric and on the overall transistor performance. An L gmin reduction of 15nm/5nm for nMOS/pMOS over our poly-Si/SiON reference, with 8% capacitance and 10% source and drain resistance (R SD ) improvement, is demonstrated. Best device performance and NBTI immunity are reached by lowering the laser power and optimizing the nitrogen and fluorine profile. This minimizes the increase of Si dangling bonds at the SiON/Si interface and the oxide fixed charges, generated by the thermo-mechanical stress (TMS) during the LA fast thermal gradient. The full potential of LA is demonstrated by skipping the RTA. An Lgmin gain of 25nm/20nm is achieved for metal gate nMOS/FUSI gate pMOS devices over the junction RTA reference. Optimal 0.26 fF/µm overlap capacitance values (at V dd =|1|V), 18%/ 23% for nMOS/pMOS lower CV/I product and pMOS improved R SD are demonstrated.

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A leading candidate for the formation of the ultrashallow junctions needed for L g ഛ 45 nm devices is the combination of coimplantation of a diffusion-retarding species such as carbon with a high temperature, millisecond annealing process after the conventional spike annealing. C coimplantation with B + for p-type metal-oxide semiconductor and P + for n-type metal-oxide semiconductor combined with conventional spike annealing produces reduced junction depths and improved dopant activation and profile abruptness, compared to similar implants without the coimplanted species. Addition of submelt laser annealing may further improve junction activation, but the dominant impact is gate depletion reduction, in that way, delaying the need to introduce metal gates. Devices show that the overlap capacitance is reduced, consistent with the shallower junction depths and reduced lateral diffusion. The improved dopant activation manifests itself in reduced series resistance and improved I on values. Finally, scanning spreading resistance microscopy measurements confirm the shallow junction depths and reduced lateral diffusion.