high-speed highly pipelined dual-input FFT/IFFT architecture efficiently sharing hardware is proposed for MIMO WLAN communication systems. It reduces the hardware complexity to enhance the throughput of the FFT/IFFT processor to be applied to IEEE 802.11n WLAN system or beyond. The area and the power consumption of the proposed design is 0.66mm 2 and 97mW at 200MHz operation frequency with dual input/output 64-point FFT/IFFT sequences using TSMC 0.18 m 1P6M technology at supply voltage of 1.8V.
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