We have applied cathodoluminescence (CL) and Raman spectroscopies to shallow trench isolation (STI) processes in large scale integration to investigate crystalline defects and stresses by extracting the wafer after each process. A sample with high standby leakage current clearly showed dislocation-related luminescence lines (D lines) in the regions surrounding the memory cell. These regions contain various sizes of active and field areas ranging from 0.5to5μm. However, a normal sample showed no D lines in any region through the STI processes. The D lines were observed after liner oxidation, which was performed after trench patterning. Raman microprobe measurements showed that the trench patterning process generated a large inhomogeneous stress distribution up to 200MPa in the regions surrounding the memory cell. The inhomogeneous stress distributions caused by the trench patterning and the subsequent thermal processes are likely the main causes of dislocations. A comparison between the D lines in the CL spectra and the stress measured by a Raman microprobe clarified the mechanism of generation of crystalline defects. We can thus optimize the process conditions in STI processes by these spectroscopic methods.

Cathodoluminessence (CL) spectroscopy was applied to optimize the shallow trench isolation (STI) process. The analysis of dislocations with CL spectroscopy could be performed during STI process steps. Then, the result of CL analysis was associated with the failure of a junction leakage current. Moreover, the analysis contributed to identifying the failure, including the root cause. As the result of CL analysis, nitride film thickness used as a mask layer of patterning was controlled at 190 nm or less. The dislocation analysis with CL spectroscopy can reduce the cycle time from 50 to 5 days.

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