This paper presents a new time-domain design procedure for three-stage amplifiers with reversed nested Miller compensation (RNMC). By utilizing this method, the values of the compensation capacitors are properly selected to achieve the best settling time. To demonstrate the effectiveness of the proposed method, a three-stage amplifier is designed and simulated in a 1V, 90nm CMOS technology. Simulation results show that by using this method, the settling time of the threestage amplifier is approximately halved in comparison with the conventional approaches.

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Since the determination of IEEE 802.11 protocol behavior against various scenarios is important, Therefore we offer two scenarios that how corrupted frames are effected on inter frame spaces and its adverse effect impact on efficiency and fairness are explained. Finally, a simple and efficient solution is provided, which in addition to solving those problems it doesn't show side affects on previous famous scenarios. Results from simulation experiments reveal that the new algorithm achieves higher throughput.