The electrical-balance (EB) duplexer concept explored in [1][2][3][4] suggests a possible integrated multiband alternative to conventional fixed-frequency surface-acoustic-wave (SAW) duplexers. The basic principle of the EB duplexer is to balance the impedances seen at the ports of a hybrid transformer to suppress signal transfer from the TX to the RX through signal cancellation ( Fig. 2.2.1). While the potential payoff is tantalizing, several challenges must still be solved before EB duplexers can become commercially viable. Specifically, the duplexer must provide high isolation and linearity in both the TX and RX bands across wide bandwidth (BW), with low insertion loss (IL), all in the presence of a real antenna whose impedance is constantly varying due to real-world user interaction. In this paper, we present a duplexer that significantly advances the state-of-the-art for two of these critical challenges: linearity and insertion loss.The single-ended duplexer topology is shown in Fig. 2.2.1. Earlier implementations of EB duplexers use a differential LNA at the RX port [1][2][3][4]. Unfortunately, even when differential-mode isolation is high, the common-mode isolation will still be unacceptable [1,4], causing the LNA to compress when the PA operates at full power [2]. A solution was proposed in [2,3], at the cost of significantly more components and increased IL. We propose the simpler approach of moving to a single-ended topology, wherein only two transfer paths exist from TX to RX. To achieve isolation between the TX and RX, a balance network impedance (Z BAL ) must be chosen so that the signals through these two transfer paths destructively interfere at the RX port. The inherent asymmetry between these two paths, arising from the hybrid transformer capacitive coupling, means that the balance network and antenna impedances will not be the same when cancellation occurs. However, this asymmetry is easily accounted for during design of Z BAL .In order to minimize insertion loss, the hybrid transformer is designed using the back-end metal stack shown in Fig. 2.2.1. It includes 3 very thick RF metals with bar-vias between all RF metals. The primary winding is stacked on top of the secondary winding to improve coupling and to shield the primary winding from the substrate. Adequate substrate shielding is particularly critical in SOI CMOS, where signals present on RF metal layers can couple into nonlinear regions at the interface between the buried-oxide layer and handle wafer to generate distortion. Thus, an orthogonally patterned grounded shield is added. A 2:1 transformation ratio is used to convert the nominal 100Ω impedance connected to the primary winding (the antenna and balance network impedance combined) to 50Ω at the single-ended RX port. The transformer center-tap (TX input) is deliberately skewed to favor TX IL over RX IL [1,4].A key challenge that motivates this proof-of-concept design is to demonstrate compliance with all linearity specifications of modern wireless standards. Most stringent among the...

An electrical-balance duplexer achieving state-ofthe-art linearity and insertion loss performance is presented, enabled by partially depleted RF silicon-on-insulator (SOI) CMOS technology. A single-ended configuration avoids the common-mode isolation problem suffered by topologies with a differential low-noise amplifier (LNA). Highly-linear switched capacitors allow for impedance balancing to antennas with <1.5:1 voltage standing wave ratio (VSWR) from 1.9 to 2.2 GHz. +70 dBm input-referred 3 rd -order intercept point (IIP3) is achieved under high transmitter (TX) power (+30.5 dBm max.). TX insertion loss is <3.7 dB and receiver insertion loss is <3.9 dB.

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