With the aggressive scaling down of the minimum feature size of advanced metal–oxide–semiconductor devices, it has become imperative to design and fabricate process-variation-immune devices. Technology computer-aided design simulations are typically used to test thousands of devices for process-variation immunity, but the process is computationally expensive. In this work, we propose a novel approach to simulate and predict the current–voltage characteristics of fin field-effect transistor devices with process-induced line-edge roughness (LER), within a few seconds. We exploit the Bayesian linear regression model to estimate the mean and standard deviation of the drain-to-source current (I DS) for an arbitrary gate voltage (V GS) and LER profile. We evaluate the prediction accuracy in terms of the mean absolute percentage error (MAPE) and root mean square error (RMSE). The MAPEs for the mean and standard deviation of I DS are <1% and <20%, respectively, and the corresponding RMSEs are 0.0804 and 0.0263, respectively. Once the I DS–V GS distribution is estimated by means of this novel approach, the distributions of other device metrics such as the threshold voltage and off-state leakage current can be estimated.

To design a device that is robust to process-induced random variation, this study proposes a machine-learning-based predictive model that can simulate the electrical characteristics of FinFETs with process-induced line-edge roughness. This model, i.e., a Bayesian neural network (BNN) model with horseshoe priors (Horseshoe-BNN), can significantly reduce the simulation time (as compared to the conventional technology computer-aided design (TCAD) simulation method) in a sufficiently accurate manner. Moreover, this model can perform autonomous model selection over the most compact layer size, which is necessary when the amount of data must be limited. The mean absolute percentage error for the mean and standard deviation of the drain-to-source current (I DS ) were ~0.5% and ~6%, respectively. By estimating the distribution of the current-voltage characteristics, the distributions of the other device metrics, such as off-state leakage current and threshold voltage, can be estimated as well.INDEX TERMS line edge roughness (LER), process-induced random variation, Bayesian neural network, automatic model selection.

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