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This paper is devoted to describe a voltage reference in which the reference voltage can be varied over a range, 0.73V to 1.4V with high stability. As an example, it has been shown through simulations that a voltage reference for 0.73V with a temperature stability of about 1 ppm/°C over the temperature range of 0 to 80°C is possible. Proposed voltage reference circuit is simulated using transistor models for 0.18-µm process.

One of the major hurdles in the design of Static Random Access Memory (SRAM) cell is the ever increasing process variations. To counter this researchers have proposed various bit-cell and non-bit-cell oriented designs. However, the proposed techniques require additional circuitry and hence account for large area overhead. In this paper we propose the use of rise time of word-line signal as a measure to reduce the impact of the process variations on the SRAM cells. Simulation results show that using a higher rise time resulted in drastic reduction in the number of cells that fail to read or write. Number of cells that can successfully write or read improved from 82% to 98.2% and 90% to 98.8% respectively. However, there is some speed penalty to achieve this.

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