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-A CMOS charge amplifier, due to its very low power consumption and good noise performance, has great interest for analog signal processing in the fields of particle physics, nuclear physics and x-or beta-ray detection. The simulation environment of Eldo TM using AMI05 (American Microsystems Inc.) technology provided by Mentor Graphics Corporation is used for noise optimization of a low power CMOS charge amplifier. Using simulation tools we have designed and simulated the output of the charge amplifier and have calculated the power consumption, band width, gain and Equivalent Noise Charge (ENC) of the circuit. We have also studied the factors on which noise of amplifier depends. This has resulted in a noise performance of ENC = 116 electrons at 0 pF detector capacitance with a power consumption of 80µW per channel. Due to its very low noise and low power consumption, this kind of new charge amplifier can be widely used in research in the fields of Particle Physics, Nuclear Physics and X-ray detection.

-Power dissipation of very large scale integrated circuits (VLSI) has emerged as a significant constraint on the semiconductor industry. For dynamic power the voltage, capacitance and frequency are the major components of power dissipation. In this paper, we propose a power macro modelling technique for the CMOS inverter using 0.12µm technology. The dynamic power is directly linked with the load capacitance (C L ), and it is lumped as all internal parasitic capacitances. In our modelling, we take account of the parasitic capacitances with their dependence on channel length and width. Suitable values of other factors (i.e. threshold voltage V T , gate voltage V GS , drain voltage V DD etc.) are used for power consumption of the CMOS inverter.