Effect Of High Temperature On The Impact Ionization Of N-Channel Fully Depleted Soi Mosfet

Ullah, Kamran; Riaz, Saira; Habib, Masum; Abbas, F.; Naseem, Shahzad; Abbas, Ghulam

doi:10.5281/zenodo.15750

2014

DOI: 10.5281/zenodo.15750

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Effect Of High Temperature On The Impact Ionization Of N-Channel Fully Depleted Soi Mosfet

Kamran Ullah¹,

Saira Riaz²,

Masum Habib³

et al.

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Early lifetime failure detection in FPGAs using delay faults

Vittala

Niamat

Vemuru

2014

NAECON 2014 - IEEE National Aerospace and Electronics Conference

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The reduction in the transistor and interconnect dimensions have a severe impact on the reliable performance of the Field Programmable Gate Array (FPGA) circuits. The process variation effects in nanometer scale technologies result in transient errors or permanent failures that cause undesired behavior of the circuit. In this work, we analyze a method for fault identification to mitigate the impact of lifetime failures such as Electro-migration (EM) and Hot Carrier Effect (HCE) in interconnect of the FPGA. This method is based on the signal delays in routing resources that include switch blocks and interconnect wires.

show abstract

Early lifetime failure detection in FPGAs using delay faults

Vittala

Niamat

Vemuru

2014

NAECON 2014 - IEEE National Aerospace and Electronics Conference

View full text Add to dashboard Cite

show abstract

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Effect Of High Temperature On The Impact Ionization Of N-Channel Fully Depleted Soi Mosfet

Cited by 1 publication

References 6 publications

Early lifetime failure detection in FPGAs using delay faults

Early lifetime failure detection in FPGAs using delay faults

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