In this work, we report the fabrication and characterization of novel four and six terminal current-driven magnetic memory cells. In particular, we experimentally demonstrate the magnetization switching of triangular and square magnets through spin-orbit torque by in-plane currents in a Pt/Ni81Fe19 (Py) heterostructure. The spin torques, generated by applying a constant current in one of multiple Pt wires, are used to switch a Py film between its multiple stable magnetic states, as quantified by anisotropic magnetoresistance (AMR) and tunnel magnetoresistance (TMR) measurements at room temperature. The observations have also been confirmed by micromagnetic simulations.

Field-free switching in perpendicular magnetic tunnel junctions (P-MTJs) can be achieved by combined injection of spin-transfer torque (STT) and spin-orbit torque (SOT) currents. In this paper, we derived the relationship between the STT and SOT critical current densities under combined injection. We included the damping–like torque (DLT) and field-like torque (FLT) components of both the STT and SOT. The results were derived when the ratio of the FLT to the DLT component of the SOT was positive. We observed that the relationship between the critical SOT and STT current densities depended on the damping constant and the magnitude of the FLT component of the STT and the SOT current. We also noted that, unlike the FLT component of SOT, the magnitude and sign of the FLT component of STT did not have a significant effect on the STT and SOT current densities required for switching. The derived results agreed well with micromagnetic simulations. The results of this work can serve as a guideline to model and develop spintronic devices using a combined injection of STT and SOT currents.

In this work, we propose a spin-based voltage comparator using a hybrid spin-CMOS circuit model. In particular, we use a 3T-MTJ (three-terminal magnetic tunnel junction) model with an in-plane magnetic anisotropy (IMA) free layer employing a spin-orbit torque (SOT) based writing scheme in the thermal activation regime to demonstrate a comparator circuit with a resolution close to 50mV. The 3T-MTJ model of the comparator was validated against existing experimental results. In addition, we analyze the delay performance of the comparator along with matching the switching delay of the MTJ with an analytical model. We also discuss potential extensions to the model and general directions for future work.