Abstract. Pipeline morphing is a simple but e ective t e c hnique for recon guring pipelined FPGA designs at run time. By overlapping computation and recon guration, the latency associated with emptying and re lling a pipeline can be avoided. We s h o w h o w morphing can be applied to linear and mesh pipelines at both word-level and bit-level, and explain how this method can be implemented using Xilinx 6200 FPGAs. We also present an approach using morphing to map a large virtual pipeline onto a small physical pipeline, and the trade-o s involved are discussed.
This paper describes an integrated system for developing regular array designs based on the block description language Ruby. Ruby supports concise design description and formal veri®cation. A parametrised Ruby description can be used in simulating, re®ning and visualising designs, and in compiling hardware implementations such as ®eld programmable gate arrays. Our system enables rapid design production, while good design quality is achieved by (a) the ecient instantiation of device-speci®c libraries, (b) the size optimisation of bit-level components using the design re®ner, and (c) the exploitation of regularity information at source level in the library composition process. The development and implementation of several median ®lters are used to illustrate the system. Ó
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