We demonstrate the nanoscale p-type Bi2Te3 powder-based saturable absorber-induced passive mode-locking of the erbium-doped fiber laser (EDFL) with sub-picosecond pulsewidth. Such a nanoscale topological insulator powder is obtained by polishing the bulk p-type Bi2Te3 in a commercial thermoelectric cooler (TE cooler). This is then directly brushed onto the end-face of a single-mode fiber patchcord, to avoid any mis-connecting loss caused by laser beam divergence, which can result in a mode-locked pulsewidth of 436 fs in the self-amplitude modulation mode of a TE cooler. To further shorten the pulse, the soliton compression is operated by well-controlling the group delay dispersion and self-phase modulation, providing the passively mode-locked EDFL with a pulsewidth as short as 403 fs.

Abstract:In this paper, we propose a current mode linear CMOS temperature sensor profiting on increasing the accuracy of thermal monitoring. Concerning the temperature dependence of threshold voltage drift and mobility degradation, the proposed method removes the critical nonlinear terms realizing very linear relationship. Through driving two temperature-dependent current sources into particular operation region with different bias conditions, we utilize a compensation scheme among the resulted complementary temperature dependences of current sources which cancels major nonlinear effect. By TSMC 0.35 μm CMOS process, within the temperature range from −20 • C to 100 • C, the measured results of an implemented chip show that temperature error and power consumption are ±0. Syst., vol. 5, no. 3, pp. 270-276, Sept. 1997. [4] M. Sasaki, M. Ikeda, and K. Asada, "A temperature sensor with an inaccuracy of −1/ + 0.8 • C using 90-nm 1-V CMOS for online thermal monitoring of VLSI circuits,"

In this work, we propose a wide band linear voltage-to-current converter (VIC) with mobility degradation compensation. By use of NMOS output stage and grounding NMOS input stage, PSRR enhances as well as body effect decreases. In addition, through utilizing the sum of two current sources operate in linear and saturation region respectively, the nonlinearity of complementary parabolic voltage to current characteristics caused by mobility degradation are reduced. A feedback loop is then inserted to increase bandwidth, so that the proposed VIC is useful in further applications. A practical chip was fabricated by TSMC 0.35 m 3.3V CMOS process with its measured transconductance ( m G ), bandwidth, and operational range are 0.975~1.032, 85.5MHz, and 1.2V respectively. The experiment results show that the proposed design significantly improves bandwidth and the nonlinearity effect of VIC originated from mobility degradation.

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This paper presents a continuous-time current comparator with low input impedance enhancing the accuracy of comparison. The proposed circuit employs low impedance common-gate structures as input stages and further uses common-source feedback structures to enable extremely reduction of input impedances. The input impedances are well designed to be balanced, so that the proposed design can be applied to perform precise comparison between two terminals with tiny varied currents. An implemented chip was fabricated by TSMC 0.35 µm CMOS process with its input impedances and propagation delay are 66.8 Ω, 66.6 Ω and 2.5 ns respectively while the average power consumption is about 1.64 mW.