Oblique deposition was used to fabricate two metal electrodes separated by a gap of less than 10 nm on a SiO2 substrate. By sweeping voltage between these electrodes, a negative resistance change of several digits was observed in vacuum. In this work, electrodes made of Au, Pd, Pt, and Ta were fabricated, and their electric properties were measured in vacuum. The negative resistance was observed for all of the four metals. The result of the measurements clearly shows the correlation between the voltage at the minimum resistance and the melting point. Also, the calculated temperature rise shows a correlation with the melting point. These facts support the effect that the thermal change of the electrode metal has a considerable effect on the electric properties of the nanogap switch (NGS).

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A method for fabricating single-crystalline nanogaps on Si substrates was developed. Polycrystalline Pt nanowires on Si substrates were broken down by current flow under various gaseous environments. The crystal structure of the nanogap electrode was evaluated using scanning electron microscopy and transmission electron microscopy. Nanogap electrodes sandwiched between Pt-large-crystal-grains were obtained by the breakdown of the wire in an O(2) or H(2) atmosphere. These nanogap electrodes show intense spots in the electron diffraction pattern. The diffraction pattern corresponds to Pt (111), indicating that single-crystal grains are grown by the electrical wire breakdown process in an O(2) or H(2) atmosphere. The Pt wires that have (111)-texture and coherent boundaries can be considered ideal as interconnectors for single molecular electronics. The simple method for fabrication of a single-crystalline nanogap is one of the first steps toward standard nanogap electrodes for single molecular instruments and opens the door to future research on physical phenomena in nanospaces.

Resistance switching in nanogap electrodes, the electrodes of which are made of platinum and gold, was investigated in air. The “off-to-on” transition in air was achieved by voltage sweeping enforced with a current-compliance operation that suppresses the overcurrent just after the change in tunneling resistance. It was also found that the applied voltages for the “on-to-off” resistance transition could be suppressed in air. These results imply that resistance switching is caused in air, and moreover, that the switching voltage is affected by the surroundings.

A 4k bits nonvolatile high-speed nanogap memory device was fabricated with a newly developed vertical nanogap structure and its memory characteristics were evaluated. The newly developed vertical nanogap structures realized controllable electrode gap and higher yield compared to the initial phase lateral type nanogap structure. The structures were integrated on a CMOS chip. The specially embedded measurement circuit revealed programming speed from a low resistance state to a high resistance state (from on to off state) to be 1 ns.Introduction One of the authors found that thin film metal electrodes with a gap less than 10 nm on an insulating substrate showed nonvolatile memory effect in vacuum [1]. Similar nanogap resistance change were widely observed for metals, such as Au, Pd, Pt, Ta [2], and even for Si [3] and carbon nanotubes [4] not only in vacuum but also in inert gases [10]. The current between the electrodes is due to electron tunneling. And the resistance corresponding to the gap distance was changed and controlled by applying voltage to the electrodes [5]. We have studied this phenomenon and applied for nonvolatile nanogap memory [8], because of its superior properties, i.e. high speed resistance switching, operation in a wide temperature range up to 200 C[1] and intrinsic high bit density. In this paper, results of integration of the nanogap memory (NGpM) on a CMOS LSI structure and evaluation of high speed switching capability using a specially embedded measurement circuit are reported.Fabrication NGpM is initially configured laterally on the insulating substrate as shown in Fig.1a, which is called as lateral type. It has been used to investigate the property and the mechanism of nanogap resistance change [1],[6], [7], however it is not suitable for memory array. We have developed various vertical type nanogap elements and finally adopted a trench type and a hole-in-line type each of which is shown in Fig.1b and 1c respectivly.[8] Using these types of nanogap element, a 4kb NGpM is integrated on a CMOS LSI in which transistors for each nanogap element selection, control circuits and the specially designed embedded measurement circuits were furnished. The technology of the CMOS LSI is 0.35 m high-voltage process of a foundry. Fabrication process on the chip is summarized in table 1. In this vertical type the gap distance between 1st and 2nd metal is determined by the spacer thickness, which is 10nm or less. The device size factor F is 40nm for hole-in-line type and 60nm for trench type. In the vertical type, the nanogap element is located at the cross point of upper and lower electrode, then 4F 2 is minimum size needed for a memory element. A nanogap element finer than 40nm also operates properly.[7] ProgrammingIn our previous work, it was very difficult to investigate the intrinsic programming speed of the nanogap elements, because of limitation of commercially available pulse generators with high-voltage high-speed drivability (10V, 10ns) and also an influence of the parasitic capacitance of lead p...