Neuromorphic computing, which emulates the biological neural systems could overcome the high‐power consumption issue of conventional von‐Neumann computing. State‐of‐the‐art artificial synapses made of two‐terminal memristors, however, show variability in filament formation and limited capacity due to their inherent single presynaptic input design. Here, a memtransistor‐based artificial synapse is realized by integrating a memristor and selector transistor into a multiterminal device using monolayer polycrys‐talline‐MoS2 grown by a scalable chemical vapor deposition (CVD) process. Notably, the memtransistor offers both drain‐ and gate‐tunable nonvolatile memory functions, which efficiently emulates the long‐term potentiation/depression, spike‐amplitude, and spike‐timing‐dependent plasticity of biological synapses. Moreover, the gate tunability function that is not achievable in two‐terminal memristors, enables significant bipolar resistive states switching up to four orders‐of‐magnitude and high cycling endurance. First‐principles calculations reveal a new resistive switching mechanism driven by the diffusion of double sulfur vacancy perpendicular to the MoS2 grain boundary, leading to a conducting switching path without the need for a filament forming process. The seamless integration of multiterminal memtransistors may offer another degree‐of‐freedom to tune the synaptic plasticity by a third gate terminal for enabling complex neuromorphic learning.

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area efficiency by mimicking human neurons, synapses, and their networks. [3,4] Memristors are known as promising candidates for artificial synapses, constituting a key building block for neuromorphic computing. Moreover, crossbar array (CBA) made of memristors is promising to construct neural networks due to its fast and highly parallelized computing capability that utilizes multiply-and-accumulate (MAC) operation based on Ohm's law and Kirchhoff 's law. [5,6] However, state-of-the-art memristive CBA using transition metal oxide (TMO) is suffering from challenges such as limited resistive switching (RS) ratio and considerable temporal (cycle-to-cycle) and spatial (device-todevice) variability, [7][8][9] which necessitates alternative material platforms with better switching reliability.Memristors based on 2D materials have emerged as a promising option over TMObased memristors [10,11] due to their unique properties and superior device performance, including large RS ratio, [12] low switching voltage, [12,13] small device variation, [14] as well as, capability of transition between the threshold and bipolar RS. [12,15] However, conventional 2D material-based memristive devices are fabricated using mechanical exfoliation, which lacks a good control of flake thickness and poor spatial variation. [16][17][18][19] Moreover, due to the single crystallinity of the exfoliated flake, post-treatments are required to decorate defects for creating switching pathways, such as, ion and electron beam irradiation, which hinder the implementation of circuits and computing hardware. [15,[20][21][22] To address these inherent limitations caused by mechanical exfoliation, considerable efforts have been dedicated to develop scalable fabrication processes. One such approach is liquid-phase exfoliation and spin-coating, which can produce large quantities of materials, but at the expense of crosspoint area scaling and nanoflake orientation control, resulting in poor endurance and low array density. [23][24][25] Another scalable approach is wafer-scale 2D material synthesis that by far has been primarily driven by logic applications which demand monolayer, high mobility, and single crystallinity. [26,27] Recently, memristors based on chemical vapor deposition (CVD) grown 2D materials with intrinsic defects have been demonstrated with the potential for wafer-scale device fabrication capability with low device Memristor crossbar with programmable conductance could overcome the energy consumption and speed limitations of neural networks when executing core computing tasks in image processing. However, the implementation of crossbar array (CBA) based on ultrathin 2D materials is hindered by challenges associated with large-scale material synthesis and device integration. Here, a memristor CBA is demonstrated using wafer-scale (2-inch) polycrystalline hafnium diselenide (HfSe 2 ) grown by molecular beam epitaxy, and a metal-assisted van der Waals transfer technique. The memristor exhibits small switching voltage (0.6 V), low switching energy...

Two-terminal resistive switching devices are commonly plagued with longstanding scientific issues including interdevice variability and sneak current that lead to computational errors and high-power consumption. This necessitates the integration of a separate selector in a one-transistor-one-RRAM (1T-1R) configuration to mitigate crosstalk issue, which compromises circuit footprint. Here, we demonstrate a multiterminal memtransistor crossbar array with increased parallelism in programming via independent gate control, which allows in situ computation at a dense cell size of 3−4.5 F 2 and a minimal sneak current of 0.1 nA. Moreover, a low switching energy of 20 fJ/bit is achieved at a voltage of merely 0.42 V. The architecture is capable of performing multiply-and-accumulate operation, a core computing task for pattern classification. A high MNIST recognition accuracy of 96.87% is simulated owing to the linear synaptic plasticity. Such computing paradigm is deemed revolutionary toward enabling data-centric applications in artificial intelligence and Internet-of-things.

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