No abstract

This letter solves a major hurdle that mars photolithography-based fabrication of micro-mesoscale structures in silicon. Conventional photolithography is usually performed on smooth, flat wafer surfaces to lay a 2D design and subsequently etch it to create single-level features. It is, however, unable to process non-flat surfaces or already etched wafers and create more than one level in the structure. In this study, we have described a novel cleanroom-based process flow that allows for easy creation of such multi-level, hierarchical 3D structures in a substrate. This is achieved by introducing an ultra-thin sacrificial silicon dioxide hardmask layer on the substrate which is first 3D patterned via multiple rounds of lithography. This 3D pattern is then scaled vertically by a factor of 200–300 and transferred to the substrate underneath via a single shot deep etching step. The proposed method is also easily characterizable—using features of different topographies and dimensions, the etch rates and selectivities were quantified; this characterization information was later used while fabricating specific target structures. Furthermore, this study comprehensively compares the novel pattern transfer technique to already existing methods of creating multi-level structures, like grayscale lithography and chip stacking. The proposed process was found to be cheaper, faster, and easier to standardize compared to other methods—this made the overall process more reliable and repeatable. We hope it will encourage more research into hybrid structures that hold the key to dramatic performance improvements in several micro-mesoscale devices.

Laser machining is an inexpensive and fast alternative to conventional microfabrication techniques and has the capability to produce complicated three-dimensional (3D), hierarchical structures. It is especially important while performing rapid prototyping and quick design studies of extreme heat flux cooling devices. One of the major issues plaguing the use of laser micromachining to manufacture commercially usable devices, is the formation of debris during cutting and the difficulty in removing these debris efficiently after the machining process. For silicon substrates, this debris can interfere with surrounding components and cause problems during bonding with other substrates by preventing uniform conformal contact. This study delves deep into the challenges faced and methods to overcome them during laser micromachining based manufacturing of such complicated 3D - Manifolded micro-cooler (3DMMC) structures. Specifically, this work summarizes several post-process techniques that can be employed for complete debris removal during etching of Silicon samples using an Nd/YVO4 ultraviolet (UV) laser, detailing the advantages and drawbacks of each approach. A method that was found to be particularly promising to achieve very smooth surfaces with almost complete debris removal was the use of Polydimethylsiloxane (PDMS) as a high rigidity protective coating. In the process, a novel technique to strip PDMS from Silicon surface was also developed. The result of this study is valuable to the micro-fabrication industry where smooth and clean substrate surfaces are highly desirable and it will significantly improve the process of using UV lasers to create microstructures for commercial applications as well as in a research environment.

This letter solves a major hurdle that mars photolithography-based fabrication of micro-mesoscale structures in silicon. Conventional photolithography is usually performed on smooth, flat wafer surfaces to lay a 2D design and subsequently etch it to create single-level features. It is, however, unable to process non-flat surfaces (already etched wafers) to create more than one level to give rise to multi-level, 3D, hierarchical structures in the substrate. In this study, we have described a novel cleanroom-based process flow that allows for easy creation of such multi-level, hierarchical structures in a substrate. This is achieved by introducing an ultra-thin sacrificial silicon dioxide hardmask layer on the substrate, which is first 3D patterned via multiple rounds of lithography. Then, this 3D pattern is scaled vertically by a factor of 200 – 300 and transferred to the substrate underneath via a single shot deep etching step. The proposed method is also easily characterizable. Using features of different topographies and dimensions, the etch rates and selectivities were quantified, these characterization information were later used while fabricating specific target structure. Furthermore, this study comprehensively compares the novel pattern transfer technique to already existing methods of creating multi-level structures, like grayscale lithography, chip stacking and double-sided etching. The proposed process was found to be cheaper, faster, and easier to standardize compared to other methods – this makes the overall process more reliable and repeatable. We hope it will encourage more research into hybrid structures that hold the key to dramatic performance improvements in several micro-mesoscale devices.

No abstract