The advances in information and communication technologies have been largely predicated around the increases in computer processor power derived from the constant miniaturization (and consequent higher density) of individual transistors. Transistor design has been largely unchanged for many years and progress has been around scaling of the basic CMOS device. Scaling has been enabled by photolithography improvements (i.e. patterning) and secondary processing such as deposition, implantation, planarization, etc. Perhaps the most important of the secondary processes is the plasma etch methodology whereby the pattern created by lithography is ‘transferred’ to the surface via a selective etch to remove exposed material. However, plasma etch technologies face challenges as scaling continues. Maintaining absolute fidelity in pattern transfer at sub-16 nm dimensions will require advances in plasma technology (plasma sources, chamber design, etc) and chemistry (etch gases, flows, interactions with substrates, etc). In this paper, we illustrate some of these challenges by discussing the formation of ultra-small device structures from the directed self-assembly of block copolymers (BCPs) where nanopatterns are formed from the micro-phase separation of the system. The polymer pattern is transferred by a double etch procedure where one block is selectively removed and the remaining block acts as a resist pattern for silicon pattern transfer. Data are presented which shows that highly regular nanowire patterns of feature size below 20 nm can be created using etch optimization techniques and in this paper we demonstrate generation of crystalline silicon nanowire arrays with feature sizes below 8 nm. BCP techniques are demonstrated to be applicable from these ultra-small feature sizes to 40 nm dimensions. Etch profiles show rounding effects because etch selectivity in these nanoscale resist patterns is limited and the resist thickness rather low. The nanoscale nature of the topography generated also places high demands on developing new etch processes.

Microphase separation of block copolymer (BCPs) thin films has high potential as a surface patterning technique. However, the process times (during thermal or solvent anneal) can be inordinately long, and for it to be introduced into manufacturing, there is a need to reduce these times from hours to minutes. We report here BCP self-assembly on two different systems, polystyrene-b-polymethylmethacrylate (PS-b-PMMA) (lamellar- and cylinder-forming) and polystyrene-b-polydimethylsiloxane (PS-b-PDMS) (cylinder-forming) by microwave irradiation to achieve ordering in short times. Unlike previous reports of microwave assisted microphase segregation, the microwave annealing method reported here was undertaken without addition of solvents. Factors such as the anneal time and temperature, BCP film thickness, substrate surface type, etc. were investigated for their effect of the ordering behavior. The microwave technique was found to be compatible with graphoepitaxy, and in the case of the PS-b-PDMS system, long-range translational alignment of the BCP domains was observed within the topographic patterns. To demonstrate the usefulness of the method, the BCP nanopatterns were turned into an 'on-chip' resist by an initial plasma etch and these were used to transfer the pattern into the substrate.

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