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Transition metal compounds showing a metal-insulator transition (MIT) show complex behavior due to strongly correlated electron effects and offer attractive properties for nano-electronics applications, which cannot be obtained with regular semiconductors. MIT based nano-electronics, however, remains unproven, and MIT devices are poorly understood. We point out and single out one of the major hurdles preventing MIT-electronics: obtaining a high Off resistance and high On-Off resistance ratio in an MIT switch. We show a path toward an MIT switch fulfilling strict Off and On resistance criteria by: (1) Obtaining understanding of the VO2-interface, a protoypical MIT material interface. (2) Introducing a MIT tunnel junction concept to tune switch resistances. In this junction, the metal or insulating phase of the MIT material controls how much current flows through. Adapting the junction's parameters allows tuning the MIT switch's Off and On resistance. (3) Providing proof of principle of the junction and its switch resistance tuning capability, experimentally in two forms. (4) Showing theoretically how stringent Off and On resistance specifications can be fulfilled. The prototypical VO2 MIT results in an abrupt change in bulk electrical resistivity at ∼68 °C. We show that the VO2 MIT manifests itself in an abrupt interfacial transition of current across a VO2-barrier interface forming a tunnel junction. In a first tunnel junction form, a two orders of magnitude abrupt change in contact resistivity induced by the bulk MIT is shown in VO2-metal contact structures. VO2-metal contact properties are discussed in detail, and the work function of VO2 is found to be 5.2eV(25 °C)−5.3eV(90 °C). In a second junction form, an abrupt change in tunneling current of up to an order of magnitude caused by the bulk MIT is shown to be present in VO2-insulator-metal capacitor structures with atomic layers deposition (ALD) Al2O3 and HfO2 barrier layers. The capacitors show the feasibility of using the MIT to switch a component to a high Off resistance state. Current and capacitance-voltage characteristics of the capacitors are analyzed as well as voltage or field dependent MITs at VO2 interfaces. The abrupt change in current across the VO2 interface is shown to be driven by the change in free carriers in bulk VO2 across the MIT.

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Abstract-In this paper, we present a design and benchmarking methodology of Spin Wave Device (SWD) circuits based on micromagnetic modeling. SWD technology is compared against a 10nm FinFET CMOS technology, considering the key metrics of area, delay and power. We show that SWD circuits outperform the 10nm CMOS FinFET equivalents by a large margin. The areadelay-power product (ADPP) of SWD is smaller than CMOS for all benchmarks from 2.5× to 800×. On average, the area of SWD circuits is 3.5× smaller and the power consumption is two orders of magnitude lower compared to the 10nm CMOS reference circuits.