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Here we demonstrate low-power resistive switching in a Ni/SiN/SiN/p-Si device by proposing a double-layered structure (SiN/SiN), where the two SiN layers have different trap densities. The LRS was measured to be as low as 1 nA at a voltage of 1 V, because the SiN layer maintains insulating properties for the LRS. The single-layered device suffers from uncontrollability of the conducting path, accompanied by the inherent randomness of switching parameters, weak immunity to breakdown during the reset process, and a high operating current. On the other hand, for a double-layered device, the effective conducting path in each layer, which can determine the operating current, can be well controlled by the I during the initial forming and set processes. A one-step forming and progressive reset process is observed for a low-power mode, which differs from the high-power switching mode that shows a two-step forming and reset process. Moreover, nonlinear behavior in the LRS, whose origin can be attributed to the P-F conduction and F-N tunneling driven by abundant traps in the silicon-rich SiN layer, would be beneficial for next-generation nonvolatile memory applications by using a conventional passive SiN layer as an active dielectric.

In this letter, we demonstrated improved resistive switching (RS) characteristics for a complementary metal-oxide-semiconductor compatible Ni/Ti/Al2O3/SiO2/Si device structure. The robust SiO2 layer deposited by the additional low-pressure chemical vapor deposition process can improve the RS characteristics such as the endurance cycle, current level, and on/off ratio. Moreover, the multilevel capability is enhanced in the bilayer structure; the larger the reset stop voltage, the greater the on/off ratio demonstrated. Furthermore, for practical RS operation, several resistance states were obtained by adjusting the pulse amplitude. This property is desirable for highly integrated nonvolatile memory applications.

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