Direct epitaxial growth of III-Vs on silicon for optical emitters and detectors is an elusive goal. Nanowires enable the local integration of high-quality III-V material, but advanced devices are hampered by their high-aspect ratio vertical geometry. Here, we demonstrate the in-plane monolithic integration of an InGaAs nanostructure p-i-n photodetector on Si. Using free space coupling, photodetectors demonstrate a spectral response from 1200-1700 nm. The 60 nm thin devices, with footprints as low as ~0.06 μm2, provide an ultra-low capacitance which is key for high-speed operation. We demonstrate high-speed optical data reception with a nanostructure photodetector at 32 Gb s−1, enabled by a 3 dB bandwidth exceeding ~25 GHz. When operated as light emitting diode, the p-i-n devices emit around 1600 nm, paving the way for future fully integrated optical links.

The seamless integration of III-V nanostructures on silicon is a long-standing goal and an important step towards integrated optical links. In the present work, we demonstrate scaled and waveguide coupled III-V photodiodes monolithically integrated on Si, implemented as InP/In0.5Ga0.5As/InP p-i-n heterostructures. The waveguide coupled devices show a dark current down to 0.048 A/cm2 at −1 V and a responsivity up to 0.2 A/W at −2 V. Using grating couplers centered around 1320 nm, we demonstrate high-speed detection with a cutoff frequency f3dB exceeding 70 GHz and data reception at 50 GBd with OOK and 4PAM. When operated in forward bias as a light emitting diode, the devices emit light centered at 1550 nm. Furthermore, we also investigate the self-heating of the devices using scanning thermal microscopy and find a temperature increase of only ~15 K during the device operation as emitter, in accordance with thermal simulation results.

On-chip optical light sources are key components in photonic integrated circuits and optical communication. In this paper, we use a novel integration technique called template-assisted selective epitaxy (TASE) to monolithically integrate InP microdisk lasers on silicon. TASE offers several advantages for new device concepts such as lateral doping, dense co-integration of different III-V materials, and in-plane integration with silicon electronics and passive components. Here, we demonstrate roomtemperature lasing from InP hexagonal microdisks integrated via TASE. In order to assess and evaluate the viability of TASE, a second InP hexagonal microdisk sample is prepared for comparison using the highly developed and mature direct wafer bonding technique. The lasing performance of the TASE monolithic devices and the bonded microdisk devices is investigated under pulsed optical pumping as a function of temperature and compared. The lasing threshold as well as the light-in light-out curves of our TASE structures compare favorably with the bonded InP hexagonal microdisks. This demonstrates that our TASE approach is a promising technique for the monolithic integration of optical devices on Si.

Recent research on nanowires (NWs) demonstrated the ability of III–V semiconductors to adopt a different crystallographic phase when they are grown as nanostructures, giving rise to a novel class of materials with unique properties. Controlling the crystal structure however remains difficult and the geometrical constraints of NWs cause integration challenges for advanced devices. Here, we report for the first time on the phase-controlled growth of micron-sized planar InP films by selecting confined growth planes during template-assisted selective epitaxy. We demonstrate this by varying the orientation of predefined templates, which results in concurrent formation of zinc-blende (ZB) and wurtzite (WZ) material exhibiting phase purities of 100% and 97%, respectively. Optical characterization revealed a 70 meV higher band gap and a 2.5× lower lifetime for WZ InP in comparison to its natural ZB phase. Further, a model for the transition of the crystal structure is presented based on the observed growth facets and the bonding configuration of InP surfaces.

Photonic crystal (PhC) cavities are promising candidates for Si photonics integrated circuits due to their ultrahigh quality (Q)-factors and small mode volumes. Here, we demonstrate a novel concept of a one-dimensional hybrid III-V/Si PhC cavity which exploits a combination of standard siliconon-insulator technology and active III-V materials. Using template-assisted selective epitaxy, the central part of a Si PhC lattice is locally replaced with III-V gain material. The III-V material is placed to overlap with the maximum of the cavity mode field profile, while keeping the major part of the PhC in Si. The selective epitaxy process enables growth parallel to the substrate and hence, inplane integration with Si, and in-situ in-plane homo-and heterojunctions. The fabricated hybrid III-V/Si PhCs show emission over the entire telecommunication band from 1.2 µm to 1.6 µm at room temperature validating the device concept and its potential towards fully integrated light sources on silicon.