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2D classification plays a pivotal role in analyzing single particle cryo-electron microscopy images. Here, we introduce a simple and loss-less pre-processor that incorporates a fast dimension-reduction (2SDR) de-noiser to enhance 2D classification. By implementing this 2SDR pre-processor prior to a representative classification algorithm like RELION and ISAC, we compare the performances with and without the pre-processor. Tests on multiple cryo-EM experimental datasets show the pre-processor can make classification faster, improve yield of good particles and increase the number of class-average images to generate better initial models. Testing on the nanodisc-embedded TRPV1 dataset with high heterogeneity using a 3D reconstruction workflow with an initial model from class-average images highlights the pre-processor improves the final resolution to 2.82 Å, close to 0.9 Nyquist. Those findings and analyses suggest the 2SDR pre-processor, of minimal cost, is widely applicable for boosting 2D classification, while its generalization to accommodate neural network de-noisers is envisioned.

Abstract. Correlation power-analysis (CPA) attacks are a serious threat for cryptographic device because the key can be disclosed from data-dependent power consumption. Hiding power consumption of encryption circuit can increase the security against CPA attacks, but it results in a large overhead for cost, speed, and energy dissipation. Masking processed data such as randomized scalar or primary base point on elliptic curve is another approach to prevent CPA attacks. However, these methods requiring pre-computed data are not suitable for hardware implementation of real-time applications. In this paper, a new CPA countermeasure performing all field operations in a randomized Montgomery domain is proposed to eliminate the correlation between target and reference power traces. After implemented in 90-nm CMOS process, our protected 521-bit dual-field elliptic curve cryptographic (DF-ECC) processor can perform one elliptic curve scalar multiplication (ECSM) in 4.57ms over GF (p 521 ) and 2.77ms over GF (2 409 ) with 3.6% area and 3.8% power overhead. Experiments from an FPGA evaluation board demonstrate that the private key of unprotected device will be revealed within 10 3 power traces, whereas the same attacks on our proposal cannot successfully extract the key value even after 10 6 measurements.

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